Visual Temporal Logic as a Rapid Prototying Tool

Martin Fränzle, Karsten Lüth

    Research output: Contribution to journalJournal articleResearchpeer-review

    Abstract

    Within this survey article, we explain real-time symbolic timing diagrams and the ICOS tool-box supporting timing-diagram-based requirements capture and rapid prototyping. Real-time symbolic timing diagrams are a full-fledged metric-time temporal logic, but with a graphical syntax reminiscent of the informal timing diagrams widely used in electrical engineering. ICOS integrates a variety of tools, ranging from graphical specification editors over tautology checking and counterexample generation to code generators emitting C or VHDL, thus bridging the gap from formal specification to rapid prototype generation.
    Original languageEnglish
    JournalComputer languages
    Volume27
    Issue number1-3
    Pages (from-to)93-113
    ISSN0096-0551
    Publication statusPublished - 2001

    Keywords

    • temporal logic
    • hardware synthesis.
    • Requirement capture
    • rapid prototyping

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