Abstract
This paper presents the theoretical basis for the design of class
AB switched current memory cells employing floating-gate MOS
transistors, suitable for ultra-low-voltage applications. To
support the theoretical assumptions circuits based on these cells
were designed using a CMOS process with threshold voltages of
0.9V. Both hand calculations and PSPICE simulations showed that
the cells designed allowed a maximum signal range better than
+/-13 micoamp, with a supply voltage down to 1V and a quiescent
bias current of 1 microamp, resulting in a very high current
efficiency and effective power consumption, as well as good noise
performance.
| Original language | English |
|---|---|
| Title of host publication | Proc. International Conference on Communications, Signals and Systems, vol.2 |
| Place of Publication | Brno |
| Publisher | Technical University of Brno |
| Publication date | 1996 |
| Pages | 535-538 |
| Publication status | Published - 1996 |
| Event | International Conference on Communications, Signals and Systems - Brno, Czech Republic Duration: 10 Sept 1996 → 12 Sept 1996 |
Conference
| Conference | International Conference on Communications, Signals and Systems |
|---|---|
| Country/Territory | Czech Republic |
| City | Brno |
| Period | 10/09/1996 → 12/09/1996 |
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