Tunable Floating-Point for Energy Efficient Accelerators

Alberto Nannarelli

doi:10.1109/ARITH.2018.8464797

Tunable Floating-Point for Energy Efficient Accelerators

Alberto Nannarelli

Research output: Chapter in Book/Report/Conference proceeding › Article in proceedings › Research › peer-review

Abstract

In this work, we address the design of an on-chip accelerator for Machine Learning and other computation-demanding applications with a Tunable Floating-Point (TFP) precision. The precision can be chosen for a single operation by selecting a specific number of bits for significand and exponent in the floating-point representation. By tuning the precision of a given algorithm to the minimum precision achieving an acceptable target error, we can make the computation more power efficient. We focus on floating-point multiplication, which is the most power demanding arithmetic operation.

Original language	English
Title of host publication	Proceedings of 2018 IEEE 25th Symposium on Computer Arithmetic
Publisher	IEEE
Publication date	2018
Pages	29-36
ISBN (Print)	9781538626139
DOIs	https://doi.org/10.1109/ARITH.2018.8464797
Publication status	Published - 2018
Event	25th Symposium on Computer Arithmetic - Amherst, United States Duration: 25 Jun 2018 → 27 Jun 2018 Conference number: 25 https://ieeexplore.ieee.org/xpl/conhome/8452530/proceeding

Conference

Conference	25th Symposium on Computer Arithmetic
Number	25
Country/Territory	United States
City	Amherst
Period	25/06/2018 → 27/06/2018
Internet address	https://ieeexplore.ieee.org/xpl/conhome/8452530/proceeding

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10.1109/ARITH.2018.8464797

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@inproceedings{0b05a80887b64dd5b174a57f61f1e36b,

title = "Tunable Floating-Point for Energy Efficient Accelerators",

abstract = "In this work, we address the design of an on-chip accelerator for Machine Learning and other computation-demanding applications with a Tunable Floating-Point (TFP) precision. The precision can be chosen for a single operation by selecting a specific number of bits for significand and exponent in the floating-point representation. By tuning the precision of a given algorithm to the minimum precision achieving an acceptable target error, we can make the computation more power efficient. We focus on floating-point multiplication, which is the most power demanding arithmetic operation.",

author = "Alberto Nannarelli",

year = "2018",

doi = "10.1109/ARITH.2018.8464797",

language = "English",

isbn = "9781538626139 ",

pages = "29--36",

booktitle = "Proceedings of 2018 IEEE 25th Symposium on Computer Arithmetic",

publisher = "IEEE",

address = "United States",

note = "25th Symposium on Computer Arithmetic, ARITH 2018 ; Conference date: 25-06-2018 Through 27-06-2018",

url = "https://ieeexplore.ieee.org/xpl/conhome/8452530/proceeding",

}

TY - GEN

T1 - Tunable Floating-Point for Energy Efficient Accelerators

AU - Nannarelli, Alberto

N1 - Conference code: 25

PY - 2018

Y1 - 2018

N2 - In this work, we address the design of an on-chip accelerator for Machine Learning and other computation-demanding applications with a Tunable Floating-Point (TFP) precision. The precision can be chosen for a single operation by selecting a specific number of bits for significand and exponent in the floating-point representation. By tuning the precision of a given algorithm to the minimum precision achieving an acceptable target error, we can make the computation more power efficient. We focus on floating-point multiplication, which is the most power demanding arithmetic operation.

AB - In this work, we address the design of an on-chip accelerator for Machine Learning and other computation-demanding applications with a Tunable Floating-Point (TFP) precision. The precision can be chosen for a single operation by selecting a specific number of bits for significand and exponent in the floating-point representation. By tuning the precision of a given algorithm to the minimum precision achieving an acceptable target error, we can make the computation more power efficient. We focus on floating-point multiplication, which is the most power demanding arithmetic operation.

U2 - 10.1109/ARITH.2018.8464797

DO - 10.1109/ARITH.2018.8464797

M3 - Article in proceedings

SN - 9781538626139

SP - 29

EP - 36

BT - Proceedings of 2018 IEEE 25th Symposium on Computer Arithmetic

PB - IEEE

T2 - 25th Symposium on Computer Arithmetic

Y2 - 25 June 2018 through 27 June 2018

ER -

Tunable Floating-Point for Energy Efficient Accelerators

Abstract

Conference

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