Towards Time-predictable Data Caches for Chip-Multiprocessors

Martin Schoeberl; Wolfgang Puffitsch; Benedikt Huber

doi:10.1007/978-3-642-10265-3_17

Towards Time-predictable Data Caches for Chip-Multiprocessors

Martin Schoeberl, Wolfgang Puffitsch, Benedikt Huber

Vienna University of Technology

Research output: Chapter in Book/Report/Conference proceeding › Article in proceedings › Research › peer-review

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Abstract

Future embedded systems are expected to use chip-multiprocessors to provide the execution power for increasingly demanding applications. Multiprocessors increase the pressure on the memory bandwidth and processor local caching is mandatory. However, data caches are known to be very hard to integrate into the worst-case execution time (WCET) analysis. We tackle this issue from the computer architecture side: provide a data cache organization that enables tight WCET analysis. Similar to the cache splitting between instruction and data, we argue to split the data cache for different data areas. In this paper we show cache simulation results for the split-cache organization, propose the modularization of the data cache analysis for the different data areas, and evaluate the implementation costs in a prototype chip-multiprocessor system.

Original language	English
Title of host publication	Proceedings of the Seventh IFIP Workshop on Software Technologies for Future Embedded and Ubiquitous Systems (SEUS 2009)
Publication date	2009
Pages	180-191
Chapter	12
ISBN (Print)	978-3-642-10264-6
ISBN (Electronic)	978-3-642-10265-3
DOIs	https://doi.org/10.1007/978-3-642-10265-3_17
Publication status	Published - 2009
Externally published	Yes
Event	Seventh IFIP Workshop on Software Technologies for Future Embedded and Ubiquitous Systems (SEUS 2009) - Newport Beach, (CA), United States Duration: 16 Nov 2009 → 18 Nov 2009 Conference number: 7

Conference

Conference	Seventh IFIP Workshop on Software Technologies for Future Embedded and Ubiquitous Systems (SEUS 2009)
Number	7
Country/Territory	United States
City	Newport Beach, (CA)
Period	16/11/2009 → 18/11/2009

Series	Lecture Notes in Computer Science
Volume	5860
ISSN	0302-9743

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title = "Towards Time-predictable Data Caches for Chip-Multiprocessors",

abstract = "Future embedded systems are expected to use chip-multiprocessors to provide the execution power for increasingly demanding applications. Multiprocessors increase the pressure on the memory bandwidth and processor local caching is mandatory. However, data caches are known to be very hard to integrate into the worst-case execution time (WCET) analysis. We tackle this issue from the computer architecture side: provide a data cache organization that enables tight WCET analysis. Similar to the cache splitting between instruction and data, we argue to split the data cache for different data areas. In this paper we show cache simulation results for the split-cache organization, propose the modularization of the data cache analysis for the different data areas, and evaluate the implementation costs in a prototype chip-multiprocessor system.",

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year = "2009",

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language = "English",

isbn = "978-3-642-10264-6",

series = "Lecture Notes in Computer Science",

publisher = "Springer",

pages = "180--191",

booktitle = "Proceedings of the Seventh IFIP Workshop on Software Technologies for Future Embedded and Ubiquitous Systems (SEUS 2009)",

note = "Seventh IFIP Workshop on Software Technologies for Future Embedded and Ubiquitous Systems (SEUS 2009), SEUS 2009 ; Conference date: 16-11-2009 Through 18-11-2009",

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Schoeberl, M, Puffitsch, W & Huber, B 2009, Towards Time-predictable Data Caches for Chip-Multiprocessors. in Proceedings of the Seventh IFIP Workshop on Software Technologies for Future Embedded and Ubiquitous Systems (SEUS 2009). Lecture Notes in Computer Science, vol. 5860, pp. 180-191, Seventh IFIP Workshop on Software Technologies for Future Embedded and Ubiquitous Systems (SEUS 2009), Newport Beach, (CA), United States, 16/11/2009. https://doi.org/10.1007/978-3-642-10265-3_17

Towards Time-predictable Data Caches for Chip-Multiprocessors. / Schoeberl, Martin; Puffitsch, Wolfgang; Huber, Benedikt.
Proceedings of the Seventh IFIP Workshop on Software Technologies for Future Embedded and Ubiquitous Systems (SEUS 2009). 2009. p. 180-191 (Lecture Notes in Computer Science, Vol. 5860).

Research output: Chapter in Book/Report/Conference proceeding › Article in proceedings › Research › peer-review

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Towards Time-predictable Data Caches for Chip-Multiprocessors

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