Timing Jitter Analysis for Clock recovery Circuits Based on an Optoelectronic Phase-Locked Loop (OPLL)

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Abstract

Timing jitter of an OPLL based clock recovery is investigated. We demonstrate how loop gain, input and VCO signal jitter, loop filter bandwidth and a loop time delay influence jitter of the extracted clock signal
Original languageEnglish
Title of host publicationConference on Lasers and Electro-Optics, 2005. (CLEO).
PublisherIEEE
Publication date2005
PagesCMZ4
ISBN (Print)1-55752-795-4
DOIs
Publication statusPublished - 2005
EventConference on Lasers and Electro-Optics 2005 - Baltimore, MD, United States
Duration: 22 May 200527 May 2005

Conference

ConferenceConference on Lasers and Electro-Optics 2005
Country/TerritoryUnited States
CityBaltimore, MD
Period22/05/200527/05/2005

Bibliographical note

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