Three-Phase PLL for Grid-Connected Power Converters under Both Amplitude and Phase Unbalanced Conditions

Md. Shamim Reza*, Fahmid Sadeque, Md Maruf Hossain, Amer M. Y. M. Ghias, Vassilios Agelidis

*Corresponding author for this work

    Research output: Contribution to journalJournal articleResearchpeer-review

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    This paper proposes a technique for accurate phase estimation of distorted three-phase grid voltages including unbalanced amplitudes and/or phase angles. An adaptive cascaded delayed signal cancellation (CDSC) strategy is used for the generation of the amplitude balanced three-phase voltages. The CDSC strategy also eliminates both odd and even harmonics from the input voltage. An algorithm is also reported for removing the phase angle deviations from the three-phase voltages including unbalanced phase angles. Finally, a phase-locked loop (PLL) is applied to estimate the phase angle of the reference phase voltage. It requires only one PLL to estimate three phase angles of the thee-phase voltages, respectively, suffering from the unbalanced amplitudes and phase angles. It is also immune to harmonic distortions at changeable frequency environment. When compared to the CDSC-PLL and dqCDSC-PLL techniques reported in the technical literature, it can provide improved phase estimation under amplitude and phase unbalanced condition. Simulated and experimental results of the technique are acquired from the MATLAB/Simulink and dSPACE1104 control board platform, respectively, for a number of case studies observed in the grid voltage.
    Original languageEnglish
    JournalIEEE Transactions on Industrial Electronics
    Issue number11
    Pages (from-to)8881 - 8891
    Publication statusPublished - 2019


    • Harmonics
    • Phase angle estimation
    • Phaselocked loop (PLL)
    • Synchronization
    • Three-phase voltage


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