Abstract
Argo is a network-on-chip developed for use in a multi-core platform designed specifically for hard real-time applications and it supports message passing across virtual end-to-end channels. Argo implements these channels using time-division-multiplexing (TDM) of the resources in the NOC following a static schedule. This requires some form of global synchrony across the platform. At the same time it is generally accepted that a large chip should employ some form of globally-asynchronous locally-synchronous (GALS) organization. By using asynchronous routers and by rethinking the microarchitecture of the network interfaces we have managed to combine TDM and GALS and obtain a very hardware-efficient implementation of the NOC. The paper gives a brief overview of the Argo NOC and focuses on two important issues: how to safely bring the NOC out of reset and timing analysis of the network of asynchronous routers.
Original language | English |
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Title of host publication | Proceedings of the 22nd European Conference on Circuit Theory and Design (ECCTD 2015) |
Number of pages | 4 |
Publisher | IEEE |
Publication date | 2015 |
ISBN (Print) | 978-1-4799-9877-7 |
DOIs | |
Publication status | Published - 2015 |
Event | 2015 European Conference on Circuit Theory and Design - Trondheim, Norway Duration: 24 Aug 2015 → 26 Aug 2015 Conference number: 22 |
Conference
Conference | 2015 European Conference on Circuit Theory and Design |
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Number | 22 |
Country/Territory | Norway |
City | Trondheim |
Period | 24/08/2015 → 26/08/2015 |