Technology Scaling Impact on Embedded ADC Design for Telecom Receivers

Jannik Hammel Nielsen, Pietro Andreani, Piero Malcovati, Andrea Baschirotto

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Abstract

This paper is concerned with the impact of technology scaling on the choice of A/D converters in telecom receivers. It is shown that the trend of diminishing feature size, together with better matching of passive components, allows the use of A/D topologies traditionally confined to low-frequency, medium-resolution applications. The design of a 10 bit 20 MS/s ADC using the successive approximation algorithm is presented in order to validate the presented concepts. By using a deep-submicron technology, the speed of the chosen architecture is pushed to meet the desired output rate.
Original languageEnglish
Title of host publicationIEEE International Symposium on Circuits and Systems, 2005. : ISCAS 2005.
PublisherIEEE
Publication date2005
Pages4614-4617
ISBN (Print)0-7803-8834-8
DOIs
Publication statusPublished - 2005
EventIEEE International Symposium on Circuits and Systems, 2005. : ISCAS 2005. -
Duration: 1 Jan 2005 → …

Conference

ConferenceIEEE International Symposium on Circuits and Systems, 2005. : ISCAS 2005.
Period01/01/2005 → …

Bibliographical note

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