Synthesis of Fault-Tolerant Embedded Systems

Petru Eles, Viacheslav Izosimov, Paul Pop, Zebo Peng

    Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

    451 Downloads (Pure)


    This work addresses the issue of design optimization for fault- tolerant hard real-time systems. In particular, our focus is on the handling of transient faults using both checkpointing with rollback recovery and active replication. Fault tolerant schedules are generated based on a conditional process graph representation. The formulated system synthesis approaches decide the assignment of fault-tolerance policies to processes, the optimal placement of checkpoints and the mapping of processes to processors, such that multiple transient faults are tolerated, transparency requirements are considered, and the timing constraints of the application are satisfied.
    Original languageEnglish
    Title of host publicationDesign, Automation, and Test in Europe Conference
    Publication date2008
    ISBN (Print)978-3-9810801-3-1
    Publication statusPublished - 2008
    Event2008 Design, Automation and Test in Europe - Munich, Germany
    Duration: 10 Mar 200814 Mar 2008


    Conference2008 Design, Automation and Test in Europe
    Internet address


    Dive into the research topics of 'Synthesis of Fault-Tolerant Embedded Systems'. Together they form a unique fingerprint.

    Cite this