Synthesis of Communication Schedules for TTEthernet-Based Mixed-Criticality Systems

Domitian Tamas-Selicean, Paul Pop, Wilfried Steiner

    Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

    Abstract

    In this paper we are interested in safety-critical distributed systems, composed of heterogeneous processing elements interconnected using the TTEthernet protocol. We address hard real-time mixed-criticality applications, which may have different criticality levels, and we focus on the optimization of the communication configuration. TTEthernet integrates three types of traffic: Time-Triggered (TT) messages, Event-Triggered (ET) messages with bounded end-to-end delay, also called Rate Constrained (RC) messages, and Best-Effort (BE) messages, for which no timing guarantees are provided. TT messages are transmitted based on static schedule tables, and have the highest priority. RC messages are transmitted if there are no TT messages, and BE traffic has the lowest priority. TT and RC traffic can carry safety-critical messages, while BE messages are non-critical. Mixed-criticality tasks and messages can be integrated onto the same architecture only if there is enough spatial and temporal separation among them. TTEthernet offers spatial separation for mixed-criticality messages through the concept of virtual links, and temporal separation, enforced through schedule tables for TT messages and bandwidth allocation for RC messages. Given the set of mixed-criticality messages in the system and the topology of the virtual links on which the messages are transmitted, we are interested to synthesize offline the static schedules for the TT messages, such that the deadlines for the TT and RC messages are satisfied, and the end-to-end delay of the RC traffic is minimized. We have proposed a Tabu Search-based approach to solve this optimization problem. The proposed algorithm has been evaluated using several benchmarks.
    Original languageEnglish
    Title of host publicationCODES+ISSS '12 : Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
    PublisherAssociation for Computing Machinery
    Publication date2012
    Pages473-482
    ISBN (Print)978-1-4503-1426-8
    DOIs
    Publication statusPublished - 2012
    Event8th IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis (CODES+ISSS '12) - Tampere, Finland
    Duration: 7 Oct 201212 Oct 2012
    http://esweek.acm.org/codesisss/

    Conference

    Conference8th IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis (CODES+ISSS '12)
    CountryFinland
    CityTampere
    Period07/10/201212/10/2012
    Internet address

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