Abstract
This paper describes a 4th order lowpass / highpass Butterworth filter implemented in switched current technique. The filter has been designed for low power operation. A prototype implementation has been made and it operates with supply voltages down to 2V and with a total supply current of 211¿A at a sampling rate of 50kHz. The chip includes a clock-generator, three current-followers, sample-and-hold and two 4th order filters. The sampling frequency is restricted to approximately 50kHz and the ratio between sampling frequency and cutoff frequency is 12.5. The dynamic-range was found to be 49dB for the highpass section and 58dB for the lowpass section, with a peak signal current of 750nA. The area of the chip core is 1.33mm2.
Original language | English |
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Title of host publication | Proceedings of the Nineteenth European Solid-State Circuits Conference |
Volume | Volume 1 |
Publisher | IEEE |
Publication date | 1993 |
Pages | 170-173 |
ISBN (Print) | 28-63-35134-X |
Publication status | Published - 1993 |
Event | 19th European Solid-State Circuits Conference - Sevilla, Spain Duration: 22 Sept 1993 → 24 Sept 1993 Conference number: 19 http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=5467852 |
Conference
Conference | 19th European Solid-State Circuits Conference |
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Number | 19 |
Country/Territory | Spain |
City | Sevilla |
Period | 22/09/1993 → 24/09/1993 |
Internet address |