This paper describes a 4th order lowpass / highpass Butterworth filter implemented in switched current technique. The filter has been designed for low power operation. A prototype implementation has been made and it operates with supply voltages down to 2V and with a total supply current of 211Â¿A at a sampling rate of 50kHz. The chip includes a clock-generator, three current-followers, sample-and-hold and two 4th order filters. The sampling frequency is restricted to approximately 50kHz and the ratio between sampling frequency and cutoff frequency is 12.5. The dynamic-range was found to be 49dB for the highpass section and 58dB for the lowpass section, with a peak signal current of 750nA. The area of the chip core is 1.33mm2.
|Title of host publication||Proceedings of the Nineteenth European Solid-State Circuits Conference|
|Publication status||Published - 1993|
|Event||19th European Solid-State Circuits Conference - Sevilla, Spain|
Duration: 22 Sep 1993 → 24 Sep 1993
Conference number: 19
|Conference||19th European Solid-State Circuits Conference|
|Period||22/09/1993 → 24/09/1993|