Abstract
Some real-time systems use a form of task-to-task communication called state-based or sample-based communication that does not impose any flow control among the communicating tasks. The concept is similar to a shared variable, where a reader may read the same value multiple times or may not read a given value at all. This paper explores time-predictable implementations of state-based communication in network-on-chip based multicore platforms through five algorithms. With the presented analysis of the implemented algorithms, the communicating tasks of one core can be scheduled independently of tasks on other cores. Assuming a specific time-predictable multicore processor, we evaluate how the read and write primitives of the five algorithms contribute to the worst-case execution time of the communicating tasks. Each of the five algorithms has specific capabilities that make them suitable for different scenarios.
Original language | English |
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Title of host publication | Proceedings of the 24th International Conference on Real-Time Networks and Systems (RTNS '16) |
Publisher | Association for Computing Machinery |
Publication date | 2016 |
Pages | 225-234 |
ISBN (Print) | 978-1-4503-4787-7 |
DOIs | |
Publication status | Published - 2016 |
Event | 24th International Conference on Real-Time Networks and Systems - Brest, France Duration: 19 Oct 2016 → 21 Oct 2016 Conference number: 24 http://rtns16.univ-brest.fr/#page=home |
Conference
Conference | 24th International Conference on Real-Time Networks and Systems |
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Number | 24 |
Country/Territory | France |
City | Brest |
Period | 19/10/2016 → 21/10/2016 |
Internet address |
Keywords
- Real-time systems
- Network-on-chip
- Multicore
- Message-passing