Abstract
In this paper we present an approach to the scheduling and voltage scaling of low-power fault-tolerant hard real-time applications mapped on distributed heterogeneous embedded systems. Processes and messages are statically scheduled, and we use process re-execution for recovering from multiple transient faults. Addressing simultaneously energy and reliability is especially challenging because lowering the voltage to reduce the energy consumption has been shown to exponentially increase the number of transient faults. In addition, time-redundancy based fault-tolerance techniques such as re-execution and dynamic voltage scaling-based low-power techniques are competing for the slack in the schedules. Our approach decides the voltage levels and start times of processes and the transmission times of messages, such that the transient faults are tolerated, the timing constraints of the application are satisfied and the energy is minimized. We present a constraint logic programming- based approach which is able to find reliable and schedulable implementations within limited energy and hardware resources. The developed algorithms have been evaluated using extensive experiments.
Original language | English |
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Title of host publication | Proceedings of the 5th International Conference on Hardware/Software Codesign and System Synthesis |
Publisher | Association for Computing Machinery |
Publication date | 2007 |
Pages | 233-238 |
ISBN (Print) | 9781595938244 |
DOIs | |
Publication status | Published - 2007 |
Event | 5th International Conference on Hardware/Software Codesign and System Synthesis - Salzburg, Austria Duration: 30 Sept 2007 → 3 Oct 2007 Conference number: 5 |
Conference
Conference | 5th International Conference on Hardware/Software Codesign and System Synthesis |
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Number | 5 |
Country/Territory | Austria |
City | Salzburg |
Period | 30/09/2007 → 03/10/2007 |