RTTM: Real-Time Transactional Memory

Martin Schoeberl, Florian Brandner, Jan Vitek

Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

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Abstract

Hardware transactional memory is a promising synchronization technology for chip-multiprocessors. It simplifies programming of concurrent applications and allows for higher concurrency than lock based synchronization. Standard transactional memory is optimized for average case throughput, but for real-time systems we are interested in worst-case execution times. We propose real-time transactional memory (RTTM) as a time-predictable synchronization solution for chip-multiprocessors in real-time systems. We define the hardware for time-predictable transactions and provide a bound for the maximum transaction retries. The proposed RTTM is evaluated with a simulation of a Java chip-multiprocessor. © 2010 ACM.
Keyword: Worst-case execution time,Real time systems,transactional memory,Multiprocessing systems,Transactional memory,Synchronization,Adaptive systems,Average case,Lock-based synchronization,real-time systems,Storage allocation (computer),Chip Multiprocessor
Original languageEnglish
Title of host publicationProceedings of the 25th ACM Symposium on Applied Computing
PublisherAssociation for Computing Machinery
Publication date2010
Pages326-333
ISBN (Print)978-16-05-58638-0
DOIs
Publication statusPublished - 2010
Externally publishedYes
Event25th Annual ACM Symposium on Applied Computing - Sierre, Switzerland
Duration: 22 Mar 201026 Mar 2010
Conference number: 25

Conference

Conference25th Annual ACM Symposium on Applied Computing
Number25
CountrySwitzerland
CitySierre
Period22/03/201026/03/2010

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