Research of PCB Parasitic Inductance in the GaN Transistor Power Loop

Research output: Chapter in Book/Report/Conference proceedingArticle in proceedings – Annual report year: 2019Researchpeer-review

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Research of PCB Parasitic Inductance in the GaN Transistor Power Loop. / Sun, Bainan; Zhang, Zhe; Andersen, Michael A. E.

Proceedings of IEEE Workshop on Wide Bandgap Power Devices and Applications. IEEE, 2019.

Research output: Chapter in Book/Report/Conference proceedingArticle in proceedings – Annual report year: 2019Researchpeer-review

Harvard

Sun, B, Zhang, Z & Andersen, MAE 2019, Research of PCB Parasitic Inductance in the GaN Transistor Power Loop. in Proceedings of IEEE Workshop on Wide Bandgap Power Devices and Applications. IEEE, IEEE Workshop on Wide Bandgap Power Devices and Applications in Asia 2019, Taipei, Taiwan, Province of China, 23/05/2019. https://doi.org/10.1109/WiPDAAsia.2019.8760312

APA

CBE

Sun B, Zhang Z, Andersen MAE. 2019. Research of PCB Parasitic Inductance in the GaN Transistor Power Loop. In Proceedings of IEEE Workshop on Wide Bandgap Power Devices and Applications. IEEE. https://doi.org/10.1109/WiPDAAsia.2019.8760312

MLA

Vancouver

Author

Sun, Bainan ; Zhang, Zhe ; Andersen, Michael A. E. / Research of PCB Parasitic Inductance in the GaN Transistor Power Loop. Proceedings of IEEE Workshop on Wide Bandgap Power Devices and Applications. IEEE, 2019.

Bibtex

@inproceedings{f6c560c333f848ed88f2ccb2eac22bfc,
title = "Research of PCB Parasitic Inductance in the GaN Transistor Power Loop",
abstract = "Gallium Nitride (GaN) transistor in the high power density converter application is widely researched nowadays. High frequency switching largely reduces the volume of passive components and also leads to challenges in the PCB layout. Parasitic inductance within the critical power loop should be minimized to fully harness the potential of GaN transistor fast switching capability. This paper provides a numerical method for the power loop inductance quantification. Experimental resultson the synchronous buck converter are given to validate the estimation accuracy.",
keywords = "Power loop inductance, GaN transistor, Finite element analysis",
author = "Bainan Sun and Zhe Zhang and Andersen, {Michael A. E.}",
year = "2019",
doi = "10.1109/WiPDAAsia.2019.8760312",
language = "English",
isbn = "9781728121451",
booktitle = "Proceedings of IEEE Workshop on Wide Bandgap Power Devices and Applications",
publisher = "IEEE",

}

RIS

TY - GEN

T1 - Research of PCB Parasitic Inductance in the GaN Transistor Power Loop

AU - Sun, Bainan

AU - Zhang, Zhe

AU - Andersen, Michael A. E.

PY - 2019

Y1 - 2019

N2 - Gallium Nitride (GaN) transistor in the high power density converter application is widely researched nowadays. High frequency switching largely reduces the volume of passive components and also leads to challenges in the PCB layout. Parasitic inductance within the critical power loop should be minimized to fully harness the potential of GaN transistor fast switching capability. This paper provides a numerical method for the power loop inductance quantification. Experimental resultson the synchronous buck converter are given to validate the estimation accuracy.

AB - Gallium Nitride (GaN) transistor in the high power density converter application is widely researched nowadays. High frequency switching largely reduces the volume of passive components and also leads to challenges in the PCB layout. Parasitic inductance within the critical power loop should be minimized to fully harness the potential of GaN transistor fast switching capability. This paper provides a numerical method for the power loop inductance quantification. Experimental resultson the synchronous buck converter are given to validate the estimation accuracy.

KW - Power loop inductance

KW - GaN transistor

KW - Finite element analysis

U2 - 10.1109/WiPDAAsia.2019.8760312

DO - 10.1109/WiPDAAsia.2019.8760312

M3 - Article in proceedings

SN - 9781728121451

BT - Proceedings of IEEE Workshop on Wide Bandgap Power Devices and Applications

PB - IEEE

ER -