Research of PCB Parasitic Inductance in the GaN Transistor Power Loop

Bainan Sun; Zhe Zhang; Michael A. E. Andersen

doi:10.1109/WiPDAAsia.2019.8760312

Research of PCB Parasitic Inductance in the GaN Transistor Power Loop

Bainan Sun, Zhe Zhang, Michael A. E. Andersen

Research output: Chapter in Book/Report/Conference proceeding › Article in proceedings › Research › peer-review

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Abstract

Gallium Nitride (GaN) transistor in the high power density converter application is widely researched nowadays. High frequency switching largely reduces the volume of passive components and also leads to challenges in the PCB layout. Parasitic inductance within the critical power loop should be minimized to fully harness the potential of GaN transistor fast switching capability. This paper provides a numerical method for the power loop inductance quantification. Experimental results
on the synchronous buck converter are given to validate the estimation accuracy.

Original language	English
Title of host publication	Proceedings of IEEE Workshop on Wide Bandgap Power Devices and Applications
Number of pages	5
Publisher	IEEE
Publication date	2019
ISBN (Print)	9781728121451
DOIs	https://doi.org/10.1109/WiPDAAsia.2019.8760312
Publication status	Published - 2019
Event	IEEE Workshop on Wide Bandgap Power Devices and Applications in Asia 2019 - Howard International House, Taipei, Taiwan, Province of China Duration: 23 May 2019 → 25 May 2019 http://www.wipda-asia2019.org/

Workshop

Workshop	IEEE Workshop on Wide Bandgap Power Devices and Applications in Asia 2019
Location	Howard International House
Country/Territory	Taiwan, Province of China
City	Taipei
Period	23/05/2019 → 25/05/2019
Internet address	http://www.wipda-asia2019.org/

Keywords

Power loop inductance
GaN transistor
Finite element analysis

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title = "Research of PCB Parasitic Inductance in the GaN Transistor Power Loop",

abstract = "Gallium Nitride (GaN) transistor in the high power density converter application is widely researched nowadays. High frequency switching largely reduces the volume of passive components and also leads to challenges in the PCB layout. Parasitic inductance within the critical power loop should be minimized to fully harness the potential of GaN transistor fast switching capability. This paper provides a numerical method for the power loop inductance quantification. Experimental resultson the synchronous buck converter are given to validate the estimation accuracy.",

keywords = "Power loop inductance, GaN transistor, Finite element analysis",

author = "Bainan Sun and Zhe Zhang and Andersen, {Michael A. E.}",

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AU - Andersen, Michael A. E.

PY - 2019

Y1 - 2019

N2 - Gallium Nitride (GaN) transistor in the high power density converter application is widely researched nowadays. High frequency switching largely reduces the volume of passive components and also leads to challenges in the PCB layout. Parasitic inductance within the critical power loop should be minimized to fully harness the potential of GaN transistor fast switching capability. This paper provides a numerical method for the power loop inductance quantification. Experimental resultson the synchronous buck converter are given to validate the estimation accuracy.

AB - Gallium Nitride (GaN) transistor in the high power density converter application is widely researched nowadays. High frequency switching largely reduces the volume of passive components and also leads to challenges in the PCB layout. Parasitic inductance within the critical power loop should be minimized to fully harness the potential of GaN transistor fast switching capability. This paper provides a numerical method for the power loop inductance quantification. Experimental resultson the synchronous buck converter are given to validate the estimation accuracy.

KW - Power loop inductance

KW - GaN transistor

KW - Finite element analysis

U2 - 10.1109/WiPDAAsia.2019.8760312

DO - 10.1109/WiPDAAsia.2019.8760312

M3 - Article in proceedings

SN - 9781728121451

BT - Proceedings of IEEE Workshop on Wide Bandgap Power Devices and Applications

PB - IEEE

T2 - IEEE Workshop on Wide Bandgap Power Devices and Applications in Asia 2019

Y2 - 23 May 2019 through 25 May 2019

ER -

Research of PCB Parasitic Inductance in the GaN Transistor Power Loop

Abstract

Workshop

Keywords

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