Reconfiguration in FPGA-Based Multi-Core Platforms for Hard Real-Time Applications

Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

Abstract

In general-purpose computing multi-core platforms, hardware accelerators and reconfiguration are means to improve performance; i.e., the average-case execution time of a software application. In hard real-time systems, such average-case speed-up is not in itself relevant - it is the worst-case execution-time of tasks of an application that determines the systems ability to respond in time. To support this focus, the platform must provide service guarantees for both communication and computation resources. In addition, many hard real-time applications have multiple modes of operation, and each mode has specific requirements. An interesting perspective on reconfigurable computing is to exploit run-time reconfiguration to support mode changes. In this paper we explore approaches to reconfiguration of communication and computation resources in the T-CREST hard real-time multi-core platform. The reconfiguration of communication resources is supported by extending the message-passing network-on-chip with capabilities for setting up, tearing down, and modifying the bandwidth of virtual circuits. The reconfiguration of computation resources, such as hardware accelerators, is performed using the dynamic partial reconfiguration capabilities found in modern FPGAs.
Original languageEnglish
Title of host publicationProceedings of the 11th International Symposium on Reconfigurable Communication‐centric Systems‐on‐Chip (ReCoSoC 2016)
Number of pages8
PublisherIEEE
Publication date2016
ISBN (Print)978‐1‐5090‐2520‐6
DOIs
Publication statusPublished - 2016
Event11th International Symposium on Reconfigurable Communication‐centric Systems‐on‐Chip (ReCoSoC 2016) - Tallinn, Estonia
Duration: 27 Jun 201629 Jun 2016
Conference number: 11
http://ati.ttu.ee/recosoc2016/

Conference

Conference11th International Symposium on Reconfigurable Communication‐centric Systems‐on‐Chip (ReCoSoC 2016)
Number11
CountryEstonia
CityTallinn
Period27/06/201629/06/2016
Internet address

Cite this

Pezzarossa, L., Schoeberl, M., & Sparsø, J. (2016). Reconfiguration in FPGA-Based Multi-Core Platforms for Hard Real-Time Applications. In Proceedings of the 11th International Symposium on Reconfigurable Communication‐centric Systems‐on‐Chip (ReCoSoC 2016) IEEE. https://doi.org/10.1109/ReCoSoC.2016.7533895