Real-Time Wait-Free Queues using Micro-Transactions

Fadi Meawad, Karthik Iyer, Martin Schoeberl, Jan Vitek

    Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

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    Abstract

    This paper evaluates the applicability of transactional mem- ory to the implementation of dierent non-blocking data structures in the context of the Real-time Specication for Java. In particular, we argue that hardware support for micro-transaction allows us to implement eciently data structures that are often dicult to realize with the atomic operations provided by stock hardware. Our main imple- mentation platform is the Java Optimized Processor sys- tem. We report on the performance of data structures imple- mented with locks, compare and swap and micro-transactions. Our results conrm that transactional memory is an inter- esting alternative to traditional concurrency control mecha- nisms.
    Original languageEnglish
    Title of host publicationProceedings of the 9th International Workshop on Java Technologies for Real-Time and Embedded Systems (JTRES 2011)
    Number of pages10
    PublisherACM
    Publication date2011
    ISBN (Print)978-1-4503-0731-4
    DOIs
    Publication statusPublished - 2011
    Event9th International Workshop on Java Technologies for Real-Time and Embedded Systems - York, United Kingdom
    Duration: 26 Sep 201128 Sep 2011
    Conference number: 9
    http://www.informatik.uni-trier.de/~ley/db/conf/jtres/jtres2011.html

    Workshop

    Workshop9th International Workshop on Java Technologies for Real-Time and Embedded Systems
    Number9
    CountryUnited Kingdom
    CityYork
    Period26/09/201128/09/2011
    Internet address

    Bibliographical note

    © ACM, 2011. This is the author's version of the work. It is posted here by permission of ACM for your personal use. Not for redistribution. The definitive version was published in JTRES '11, http://doi.acm.org/10.1145/2043910.2043912

    Keywords

    • Wait-Free queue
    • MCAS
    • CAS
    • Transactional Memory

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