Practical Aspects of CMOS Layout

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    Abstract

    The topics covered in these notes are the practical aspects and limitations of layout, when random process variations result in electrical parameters, which are not constant but rather statistically distributed.The focus is on design methods for reducing or eliminating the effects. The notes cover three aspects:1) to introduce layout structures robust to process variations2) to present simplistic models for analog building blocks with the aim of analysing consequences of parameter variations3) to present the basic noise considerations which guide the layout of supply structures etc.
    Original languageEnglish
    Number of pages50
    Publication statusPublished - 1996

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