Performance Analysis of a Low-Noise, Highly Linear Distributed Amplifier in 500-nm InP/InGaAs DHBT Technology

This article is an extension of the previous report on an ultrawideband distributed amplifier (DA) in the InP double heterojunction bipolar transistor (DHBT) technology. With the choice of a tricode unit cell, the Miller capacitance is reduced and a larger bandwidth (BW) is obtained. Measured S-parameters show a 3-dB BW of near dc to >170 GHz with a gain of 12 dB. In addition, the circuit operates in low dc bias conditions, thus yielding a low measured noise figure (NF) of 8 dB over the frequency range of 5–50 GHz and 12 dB at 135 GHz. Within the 5–50-GHz frequency range, the NF is only 0.5 dB higher than the NF of a similar DA with cascode unit cell. When the circuit is measured for large-signal condition, it reaches a 1-dB output compression point, P1 dB, of 8.4 dBm at 150 GHz, a saturated output power of approximately 10 dBm, and an associated maximum power-added efficiency (PAE) of 6%. This is the best linearity as well as the highest saturated output power and PAE reported at this frequency for DAs. When measured at 20 GHz, the circuit shows a P1 dB, of 9 dBm and output referred third-order intercept point of 22 dBm, a saturated output power of 11 dBm, and an associated maximum PAE of 6%, thereby proving its uniform large-signal character within the full band. In short, this circuit brings in the unique combination of low NF, highly linear characteristics, and high PAE simultaneously together over large BW. Furthermore, the circuit consumes 180 mW of dc power only.