Optimization of Nonlinear Figure-of-Merits of Integrated Power MOSFETs in Partial SOI Process

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Abstract

State-of-the-art power semiconductor industry uses figure-of-merits (FOMs) for technology-to-technology and/or device-to-device comparisons. However, the existing FOMs are fundamentally nonlinear due to the nonlinearities of the parameters such as the gate charge and the output charge versus different operating conditions. A systematic analysis of the optimization of these FOMs has not been previously established. The optimization methods are verified on a 100 V power MOSFET implemented in a 0.18 µm partial SOI process. Its FOMs are lowered by 1.3-18.3 times and improved by 22-95 % with optimized conditions of quasi-zero voltage switching
Original languageEnglish
Title of host publicationProceedings of XXV International Scientific Conference Electronics
Number of pages4
PublisherIEEE
Publication date2016
ISBN (Print)978-1-5090-2883-2
DOIs
Publication statusPublished - 2016
EventXXV International Scientific Conference Electronics - Sozopol, Bulgaria
Duration: 12 Sep 201614 Sep 2016

Conference

ConferenceXXV International Scientific Conference Electronics
CountryBulgaria
CitySozopol
Period12/09/201614/09/2016

Keywords

  • Figure of Merit
  • Gate Charge
  • Output Charge
  • Power MOSFET
  • Silicon-on-Insulator

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