On the Scalability of Time-predictable Chip-Multiprocessing

Wolfgang Puffitsch, Martin Schoeberl

    Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

    Abstract

    Real-time systems need a time-predictable execution platform to be able
    to determine the worst-case execution time statically. In order to be
    time-predictable, several advanced processor features, such as
    out-of-order execution and other forms of speculation, have to be
    avoided. However, just using simple processors is not an option for
    embedded systems with high demands on computing power. In order to
    provide high performance and predictability we argue to use
    multiprocessor systems with a time-predictable memory interface. In this paper we present the scalability of a Java chip-multiprocessor system
    that is designed to be time-predictable. Adding time-predictable caches
    is mandatory to achieve scalability with a shared memory multi-processor system. As Java bytecode retains information about the nature of memory accesses, it is possible to implement a memory hierarchy that takes the characteristics of different types of accesses into account. For tasks 
    with low communication the measured speedup of this time-predictable
    system is in the range of 6 to 7 for eight processor cores, compared to
    execution on a single-core processor.

    Original languageEnglish
    Title of host publicationProceedings of the 10th International Workshop on Java Technologies for Real-time and Embedded Systems
    PublisherAssociation for Computing Machinery
    Publication date2012
    Pages98-104
    ISBN (Print)978-1-4503-1688-0
    DOIs
    Publication statusPublished - 2012
    Event10th International Workshop on Java Technologies for Real-time and Embedded Systems (JTRES 2012) - Technical University of Denmark, Copenhagen, Denmark
    Duration: 24 Oct 201226 Oct 2012
    http://jtres2012.imm.dtu.dk/

    Workshop

    Workshop10th International Workshop on Java Technologies for Real-time and Embedded Systems (JTRES 2012)
    LocationTechnical University of Denmark
    CountryDenmark
    CityCopenhagen
    Period24/10/201226/10/2012
    Internet address

    Cite this

    Puffitsch, W., & Schoeberl, M. (2012). On the Scalability of Time-predictable Chip-Multiprocessing. In Proceedings of the 10th International Workshop on Java Technologies for Real-time and Embedded Systems (pp. 98-104). Association for Computing Machinery. https://doi.org/10.1145/2388936.2388953