Noise Analysis of Switched-Current Circuits

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    Abstract

    The understanding of noise in analog sampled data systems is vital for the design of high resolution circuitry. In this paper a general description of sampled and held noise is presented. The noise calculations are verified by measurements on an analog delay line implemented using switched-current (SI) technique
    Original languageEnglish
    Title of host publicationCircuits and Systems, 1998. ISCAS '98. Proceedings of the 1998 IEEE International Symposium on
    Volume1
    PublisherIEEE
    Publication date1998
    Pages108-111
    ISBN (Print)0-7803-4455-3
    DOIs
    Publication statusPublished - 1998
    Event1998 IEEE International Symposium on Circuits and Systems - Monterey, CA, United States
    Duration: 31 May 19983 Jun 1998
    http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=5627

    Conference

    Conference1998 IEEE International Symposium on Circuits and Systems
    CountryUnited States
    CityMonterey, CA
    Period31/05/199803/06/1998
    Internet address

    Bibliographical note

    Copyright: 1998 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE

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