Nanowire-based multiple quantum dot memory

Henrik A. Nilsson; Claes Thelander; Linus E. Fröberg; Lars Samuelson; Jakob B. Wagner

doi:10.1063/1.2362594

Nanowire-based multiple quantum dot memory

Henrik A. Nilsson, Claes Thelander, Linus E. Fröberg, Lars Samuelson, Jakob B. Wagner

Lund University

Research output: Contribution to journal › Journal article › Research › peer-review

Abstract

The authors propose and demonstrate an alternative memory concept in which a storage island is connected to a nanowire containing a stack of nine InAs quantum dots, each separated by thin InP tunnel barriers. Transport through the quantum dot structure is suppressed for a particular biasing window due to misalignment of the energy levels. This leads to hysteresis in the charging/discharging of the storage island. The memory operates for temperatures up to around 150 K and has write times down to at least 15 ns. A comparison is made to a nanowire memory based on a single, thick InP barrier. © 2006 American Institute of Physics.

Original language	English
Journal	Applied Physics Letters
Volume	89
Issue number	16
Pages (from-to)	163101
Number of pages	3
ISSN	0003-6951
DOIs	https://doi.org/10.1063/1.2362594
Publication status	Published - 2006
Externally published	Yes

Keywords

Electric wire
Hysteresis
Nanostructured materials
Semiconducting indium phosphide
Semiconductor storage
Semiconductor quantum dots
T

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title = "Nanowire-based multiple quantum dot memory",

abstract = "The authors propose and demonstrate an alternative memory concept in which a storage island is connected to a nanowire containing a stack of nine InAs quantum dots, each separated by thin InP tunnel barriers. Transport through the quantum dot structure is suppressed for a particular biasing window due to misalignment of the energy levels. This leads to hysteresis in the charging/discharging of the storage island. The memory operates for temperatures up to around 150 K and has write times down to at least 15 ns. A comparison is made to a nanowire memory based on a single, thick InP barrier. {\textcopyright} 2006 American Institute of Physics.",

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T1 - Nanowire-based multiple quantum dot memory

AU - Nilsson, Henrik A.

AU - Thelander, Claes

AU - Fröberg, Linus E.

AU - Samuelson, Lars

AU - Wagner, Jakob B.

PY - 2006

Y1 - 2006

N2 - The authors propose and demonstrate an alternative memory concept in which a storage island is connected to a nanowire containing a stack of nine InAs quantum dots, each separated by thin InP tunnel barriers. Transport through the quantum dot structure is suppressed for a particular biasing window due to misalignment of the energy levels. This leads to hysteresis in the charging/discharging of the storage island. The memory operates for temperatures up to around 150 K and has write times down to at least 15 ns. A comparison is made to a nanowire memory based on a single, thick InP barrier. © 2006 American Institute of Physics.

AB - The authors propose and demonstrate an alternative memory concept in which a storage island is connected to a nanowire containing a stack of nine InAs quantum dots, each separated by thin InP tunnel barriers. Transport through the quantum dot structure is suppressed for a particular biasing window due to misalignment of the energy levels. This leads to hysteresis in the charging/discharging of the storage island. The memory operates for temperatures up to around 150 K and has write times down to at least 15 ns. A comparison is made to a nanowire memory based on a single, thick InP barrier. © 2006 American Institute of Physics.

KW - Electric wire

KW - Hysteresis

KW - Nanostructured materials

KW - Semiconducting indium phosphide

KW - Semiconductor storage

KW - Semiconductor quantum dots

KW - T

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M3 - Journal article

SN - 0003-6951

VL - 89

SP - 163101

JO - Applied Physics Letters

JF - Applied Physics Letters

IS - 16

ER -

Nanowire-based multiple quantum dot memory

Abstract

Keywords

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