This paper derives a set of parameters to be optimized when designing filters for digital demodulation and range prefiltering in SAR systems. Aiming at an implementation in field programmable gate arrays (FPGAs), an approach for the design of multiplier-free filters is outlined. Design results are presented in terms of filter complexity and performance. One filter has been coded in VHDL and preliminary results indicate that the filter can meet a 2 GHz input sample rate.
|Title of host publication||Proceedings of the IEEE 2001 International Geoscience and Remote Sensing Symposium|
|Publication status||Published - 2001|
|Event||IEEE 2001 International Geoscience and Remote Sensing Symposium - Sydney, Australia|
Duration: 9 Jul 2001 → 13 Jul 2001
|Conference||IEEE 2001 International Geoscience and Remote Sensing Symposium|
|Period||09/07/2001 → 13/07/2001|