In this paper, we propose a technique to synthesize a cost-efficient distributed platform consisting of multiple Application Specific Instruction Set Processors (multi-ASIPs) running applications with strict timing constraints. Multi-ASIP platform synthesis is a non-trivial task for two reasons. Firstly, we need to know the WCET of tasks in target applications to derive platforms (including synthesized ASIPs) in which the tasks are schedulable. However, the WCET of tasks can be known only after the ASIPs are synthesized. We break this circular dependency by using a probability distribution of the WCET of a task (further referred to as the WCET uncertainty model), which takes into account the underlying microarchitectural configurations for the ASIP implementation. Secondly, the datapath area of the multi-ASIPs synthesized is an important design factor that contributes significantly towards the overall cost of the platform. We propose an area estimation model and a WCET uncertainty model that consider the effect of task datapath similarity. Based on these two models, we support the designer in exploring cost/performance trade-offs during the platform synthesis. We propose an Evolutionary Algorithm-based approach to solve this multiobjective optimization problem. The proposed approach has been evaluated using several benchmarks and it provides a number of multi-ASIP platform solutions exploring the trade-offs in the cost/performance design space.
|Title of host publication||2013 IEEE 19th International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA)|
|Publication status||Published - 2013|
|Event||19th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2013) - Taipei, Taiwan, Province of China|
Duration: 19 Aug 2013 → 21 Aug 2013
|Conference||19th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2013)|
|Country||Taiwan, Province of China|
|Period||19/08/2013 → 21/08/2013|