Abstract
This paper deals with a system-level design of a digital sigma-delta (∑∆) modulator for hearing-aid audio Class D output stage application. The aim of this paper is to provide a thorough discussion on various possibilities and tradeoffs of ∑∆ modulator system-level design parameter combinations - order, oversampling ratio (OSR) and number of bits in the quantizer - including their impact on interpolation filter design as well. The system is kept in digital domain up to the input of the Class D power stage including the digital pulse width modulation (DPWM) block. Notes on the impact of the DPWM block on the modulated spectrum are provided.
Original language | English |
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Title of host publication | 8th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME) |
Publisher | IEEE |
Publication date | 2012 |
Pages | 103-106 |
Publication status | Published - 2012 |
Event | 2012 8th Conference on Ph.D. Research in Microelectronics and Electronics - RWTH Aachen University, Aachen, Germany Duration: 12 Jun 2012 → 15 Jun 2012 |
Conference
Conference | 2012 8th Conference on Ph.D. Research in Microelectronics and Electronics |
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Location | RWTH Aachen University |
Country/Territory | Germany |
City | Aachen |
Period | 12/06/2012 → 15/06/2012 |
Keywords
- Sigma-Delta modulator
- Interpolation filter
- Class D
- Hearing aid
- Low voltage, low power