Abstract
Errors is one major challenge in quantum computing. Presently, general error correction cannot be deployed practically. Other ways to reduce error rates require a precise knowledge about errors. This information is for example used in tooling to improve overall circuit error rates. Doing so can increase the sizes of practical circuits on current systems and therefore allow for larger hybrid high performance computing and quantum computing applications. Calibrations of quantum hardware are used to reduce error rates and report error rates. Because calibrations take a significant amount of time they are typically only run once per day. The error rates found are only valid during calibration as error rates drift, can change rapidly and by a factor of 2–3. In this paper, we show how to use experiments to precisely calculate estimates of error rates for quantum hardware. We show that by running generated structural test circuits, we can model error rates which are closer to the actual hardware error rates than the older calibration data. The produced estimates are vital inputs to several parts of a combined high performance computing and quantum computing system.
Original language | English |
---|---|
Title of host publication | Proceedings of 2023 IEEE International Conference on Quantum Computing and Engineering (QCE) |
Number of pages | 5 |
Publisher | IEEE |
Publication date | 2023 |
Pages | 122-126 |
ISBN (Electronic) | 979-8-3503-4323-6 |
DOIs | |
Publication status | Published - 2023 |
Event | 2023 IEEE International Conference on Quantum Computing and Engineering - Hyatt Regency Bellevue, Bellevue, United States Duration: 17 Sept 2023 → 22 Sept 2023 |
Conference
Conference | 2023 IEEE International Conference on Quantum Computing and Engineering |
---|---|
Location | Hyatt Regency Bellevue |
Country/Territory | United States |
City | Bellevue |
Period | 17/09/2023 → 22/09/2023 |
Keywords
- Error estimation
- Error modeling
- Quantum circuits