Mixed Analog/Digital Matrix-Vector Multiplier for Neural Network Synapses

Torsten Lehmann, Erik Bruun, Casper Dietrich

    Research output: Contribution to journalJournal articleResearchpeer-review


    In this work we present a hardware efficient matrix-vector multiplier architecture for artificial neural networks with digitally stored synapse strengths. We present a novel technique for manipulating bipolar inputs based on an analog two's complements method and an accurate current rectifier/sign detector. Measurements on a CMOS test chip are presented and validates the techniques. Further, we propose to use an analog extension, based on a simple capacitive storage, for enhancing weight resolution during learning. It is shown that the implementation of Hebbian learning and back-propagation learning in this system is possible using very little additional hardware compared to the recall mode system.
    Original languageEnglish
    JournalAnalog Integrated Circuits and Signal Processing
    Issue number1
    Pages (from-to)55-63
    Publication statusPublished - 1996


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