Mismatch-Shaping Serial Digital-to-Analog Converter

Jesper Steensgaard-Madsen; Un-Ku Moon; Gabor C. Temes

doi:10.1109/ISCAS.1999.780472

Mismatch-Shaping Serial Digital-to-Analog Converter

Jesper Steensgaard-Madsen
, Un-Ku Moon
, Gabor C. Temes

Oregon State University

Research output: Chapter in Book/Report/Conference proceeding › Article in proceedings › Research › peer-review

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Abstract

A simple but accurate pseudo-passive mismatch-shaping D/A converter is described. A digital state machine is used to control the switching sequence of a symmetric two-capacitor network that performs the D/A conversion. The error caused by capacitor mismatch is uncorrelated with the input signal and has only little power in the signal band. The system has been simulated assuming a 0.1% capacitor mismatch, and the achieved SNDR performance was 100 dB for an oversampling ratio of 7.

Original language	English
Title of host publication	Proc. IEEE International Symposium on Circuits and Systems, vol. 2
Place of Publication	Piscataway
Publisher	IEEE
Publication date	1999
Pages	5-8
ISBN (Print)	0-7803-5471-0
DOIs	https://doi.org/10.1109/ISCAS.1999.780472
Publication status	Published - 1999
Event	1999 IEEE International Symposium on Circuits and Systems - Orlando, FL, United States Duration: 30 May 1999 → 2 Jun 1999 http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=6311

Conference

Conference	1999 IEEE International Symposium on Circuits and Systems
Country/Territory	United States
City	Orlando, FL
Period	30/05/1999 → 02/06/1999
Internet address	http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=6311

Bibliographical note

Copyright 1999 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.

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title = "Mismatch-Shaping Serial Digital-to-Analog Converter",

abstract = "A simple but accurate pseudo-passive mismatch-shaping D/A converter is described. A digital state machine is used to control the switching sequence of a symmetric two-capacitor network that performs the D/A conversion. The error caused by capacitor mismatch is uncorrelated with the input signal and has only little power in the signal band. The system has been simulated assuming a 0.1\% capacitor mismatch, and the achieved SNDR performance was 100 dB for an oversampling ratio of 7.",

author = "Jesper Steensgaard-Madsen and Un-Ku Moon and Temes, \{Gabor C.\}",

note = "Copyright 1999 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.; 1999 IEEE International Symposium on Circuits and Systems ; Conference date: 30-05-1999 Through 02-06-1999",

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doi = "10.1109/ISCAS.1999.780472",

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AU - Steensgaard-Madsen, Jesper

AU - Moon, Un-Ku

AU - Temes, Gabor C.

N1 - Copyright 1999 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.

PY - 1999

Y1 - 1999

N2 - A simple but accurate pseudo-passive mismatch-shaping D/A converter is described. A digital state machine is used to control the switching sequence of a symmetric two-capacitor network that performs the D/A conversion. The error caused by capacitor mismatch is uncorrelated with the input signal and has only little power in the signal band. The system has been simulated assuming a 0.1% capacitor mismatch, and the achieved SNDR performance was 100 dB for an oversampling ratio of 7.

AB - A simple but accurate pseudo-passive mismatch-shaping D/A converter is described. A digital state machine is used to control the switching sequence of a symmetric two-capacitor network that performs the D/A conversion. The error caused by capacitor mismatch is uncorrelated with the input signal and has only little power in the signal band. The system has been simulated assuming a 0.1% capacitor mismatch, and the achieved SNDR performance was 100 dB for an oversampling ratio of 7.

U2 - 10.1109/ISCAS.1999.780472

DO - 10.1109/ISCAS.1999.780472

M3 - Article in proceedings

SN - 0-7803-5471-0

SP - 5

EP - 8

BT - Proc. IEEE International Symposium on Circuits and Systems, vol. 2

PB - IEEE

CY - Piscataway

T2 - 1999 IEEE International Symposium on Circuits and Systems

Y2 - 30 May 1999 through 2 June 1999

ER -

Mismatch-Shaping Serial Digital-to-Analog Converter

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