Minimum-Energy Sub-Threshold Self-Timed Circuits: Design Methodology and a Case Study

Omer Can Akgun, Joachim Rodrigues, Jens Sparsø

    Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review


    This paper addresses the design of self-timed energyminimum circuits, operating in the sub-VT domain. The paper presents a generic implementation template using bundled-data circuitry and current sensing completion detection. To support this, a fully-decoupled latch controller has been developed, which integrates the current sensing circuitry. The paper outlines a corresponding design flow, which is based on contemporary synchronous EDA tools, and which transforms a synchronous design, into a corresponding self-timed circuit. The design flow and the current-sensing technique is validated by the implementation of an asynchronous version of a wavelet based event detector for cardiac pacemaker applications in a standard 65nm CMOS process. The chip has been fabricated and the area overhead due to power domain separation and completion detection circuitry is 13.6 %. The improvement in throughput due to asynchronous operation is 52.58 %. By trading the throughput improvement, energy dissipation is reduced by 16.8% at the energy-minimum supply voltage.
    Original languageEnglish
    Title of host publicationProceedings of the 16th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC'10)
    PublisherIEEE Computer Society Press
    Publication date2010
    ISBN (Print)978-0-7695-4032-0
    Publication statusPublished - 2010
    Event2010 IEEE Symposium on Asynchronous Circuits and Systems - Grenoble, France
    Duration: 3 May 20106 May 2010
    Conference number: 16


    Conference2010 IEEE Symposium on Asynchronous Circuits and Systems
    Internet address


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