Abstract
Transactional memory is a promising technique for enforcing disciplined access to shared data in a multiprocessor system. Transactional memory simplifies the implementation of a variety of concurrent data structures. In this paper, we study the benefits of a modest, real-time aware, hardware implementation of transactional memory that we call micro-transactions. In particular, we argue that hardware support for micro-transactions allows us to efficiently implement certain data structures. Those data structures are difficult to realize with the atomic operations provided by stock hardware and provide real-time guarantees for those operations. Our main implementation platform is the Java Optimized Processor system, a field-programmable gate array (FPGA) implementation of the Java virtual machine, optimized for real-time Java. We report on the performance of data structures implemented with locks, atomic instructions, and micro-transactions. Our results suggest that transactional memory is an interesting alternative to traditional concurrency control mechanisms.
Original language | English |
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Journal | Concurrency and Computation: Practice & Experience |
Volume | 25 |
Issue number | 16 |
Pages (from-to) | 2252–2268 |
ISSN | 1532-0626 |
DOIs | |
Publication status | Published - 2013 |
Keywords
- Transactional memory
- Real-time systems
- Lock-free queues