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Low power/low voltage techniques for analog CMOS circuits
Marco Cassia
Research output
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Book/Report
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Ph.D. thesis
2712
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Dive into the research topics of 'Low power/low voltage techniques for analog CMOS circuits'. Together they form a unique fingerprint.
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Engineering
Locked Loop
100%
Nonlinearity
40%
Power Supply
40%
Simulation Result
20%
Applicability
20%
Input Voltage
20%
Output Voltage
20%
Accurate Simulation
20%
Amplifier
20%
Measured Value
20%
Phase Locked Loop
20%
Real Situation
20%
Loop Response
20%
Digital Counter
20%
Limitations
20%
Natural Frequency
20%
Analytical Model
20%
Frequency Response
20%
Keyphrases
RF Circuits
16%
Low-voltage Design
16%