Low Power Continuous-Time Delta-Sigma ADC with Current Output DAC

Niels Marker-Villumsen; Ivan Harald Holger Jørgensen; Erik Bruun

doi:10.1109/ECCTD.2015.7300096

Low Power Continuous-Time Delta-Sigma ADC with Current Output DAC

Niels Marker-Villumsen, Ivan Harald Holger Jørgensen, Erik Bruun

Research output: Chapter in Book/Report/Conference proceeding › Article in proceedings › Research › peer-review

Abstract

The paper presents a continuous-time (CT) DeltaSigma (∆Σ) analog-to-digital converter (ADC) using a current output digital-to-analog converter (DAC) for the feedback. From circuit analysis it is shown that using a current output DAC makes it possible to relax the noise requirements of the 1st integrator of the loopfilter, and thereby reduce the current consumption. Furthermore, the noise of the current output DAC being dependent on the ADC input signal level, enabling a dynamic range that is larger than the peak signal-to-noise ratio (SNR). The current output DAC is used in a 3rd order multibit CT ∆Σ ADC for audio applications, designed in a 0.18 µm CMOS process, with active-RC integrators, a 7-level Flash ADC quantizer and current output DAC for the feedback. From simulations the ADC achieves a dynamic range of 95.0 dB in the audio band, with a current consumption of 284 µA for a 1.7 V supply voltage; the resulting figure-of-merit is 262 fJ/conversion.

Original language	English
Title of host publication	Proceedings of ECCTD 2015
Number of pages	4
Publisher	IEEE
Publication date	2015
ISBN (Print)	978-1-4799-9877-7
DOIs	https://doi.org/10.1109/ECCTD.2015.7300096
Publication status	Published - 2015
Event	2015 European Conference on Circuit Theory and Design - Trondheim, Norway Duration: 24 Aug 2015 → 26 Aug 2015 Conference number: 22

Conference

Conference	2015 European Conference on Circuit Theory and Design
Number	22
Country/Territory	Norway
City	Trondheim
Period	24/08/2015 → 26/08/2015

Keywords

Delta-Sigma ADC
Continuous-time
Current output DAC
Low power design

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10.1109/ECCTD.2015.7300096

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title = "Low Power Continuous-Time Delta-Sigma ADC with Current Output DAC",

abstract = "The paper presents a continuous-time (CT) DeltaSigma (∆Σ) analog-to-digital converter (ADC) using a current output digital-to-analog converter (DAC) for the feedback. From circuit analysis it is shown that using a current output DAC makes it possible to relax the noise requirements of the 1st integrator of the loopfilter, and thereby reduce the current consumption. Furthermore, the noise of the current output DAC being dependent on the ADC input signal level, enabling a dynamic range that is larger than the peak signal-to-noise ratio (SNR). The current output DAC is used in a 3rd order multibit CT ∆Σ ADC for audio applications, designed in a 0.18 µm CMOS process, with active-RC integrators, a 7-level Flash ADC quantizer and current output DAC for the feedback. From simulations the ADC achieves a dynamic range of 95.0 dB in the audio band, with a current consumption of 284 µA for a 1.7 V supply voltage; the resulting figure-of-merit is 262 fJ/conversion.",

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AU - Bruun, Erik

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PY - 2015

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N2 - The paper presents a continuous-time (CT) DeltaSigma (∆Σ) analog-to-digital converter (ADC) using a current output digital-to-analog converter (DAC) for the feedback. From circuit analysis it is shown that using a current output DAC makes it possible to relax the noise requirements of the 1st integrator of the loopfilter, and thereby reduce the current consumption. Furthermore, the noise of the current output DAC being dependent on the ADC input signal level, enabling a dynamic range that is larger than the peak signal-to-noise ratio (SNR). The current output DAC is used in a 3rd order multibit CT ∆Σ ADC for audio applications, designed in a 0.18 µm CMOS process, with active-RC integrators, a 7-level Flash ADC quantizer and current output DAC for the feedback. From simulations the ADC achieves a dynamic range of 95.0 dB in the audio band, with a current consumption of 284 µA for a 1.7 V supply voltage; the resulting figure-of-merit is 262 fJ/conversion.

AB - The paper presents a continuous-time (CT) DeltaSigma (∆Σ) analog-to-digital converter (ADC) using a current output digital-to-analog converter (DAC) for the feedback. From circuit analysis it is shown that using a current output DAC makes it possible to relax the noise requirements of the 1st integrator of the loopfilter, and thereby reduce the current consumption. Furthermore, the noise of the current output DAC being dependent on the ADC input signal level, enabling a dynamic range that is larger than the peak signal-to-noise ratio (SNR). The current output DAC is used in a 3rd order multibit CT ∆Σ ADC for audio applications, designed in a 0.18 µm CMOS process, with active-RC integrators, a 7-level Flash ADC quantizer and current output DAC for the feedback. From simulations the ADC achieves a dynamic range of 95.0 dB in the audio band, with a current consumption of 284 µA for a 1.7 V supply voltage; the resulting figure-of-merit is 262 fJ/conversion.

KW - Delta-Sigma ADC

KW - Continuous-time

KW - Current output DAC

KW - Low power design

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DO - 10.1109/ECCTD.2015.7300096

M3 - Article in proceedings

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BT - Proceedings of ECCTD 2015

PB - IEEE

T2 - 2015 European Conference on Circuit Theory and Design

Y2 - 24 August 2015 through 26 August 2015

ER -

Low Power Continuous-Time Delta-Sigma ADC with Current Output DAC

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