Low Capacitive Inductors for Fast Switching Devices in Active Power Factor Correction Applications

Juan Carlos Hernandez Botella; Lars Press Petersen; Michael A. E. Andersen

doi:10.1109/IPEC.2014.6870168

Low Capacitive Inductors for Fast Switching Devices in Active Power Factor Correction Applications

Juan Carlos Hernandez Botella
, Lars Press Petersen
, Michael A. E. Andersen

Research output: Chapter in Book/Report/Conference proceeding › Article in proceedings › Research › peer-review

2552 Downloads (Orbit)

Abstract

This paper examines different winding strategies for reduced capacitance inductors in active power factor correction circuits (PFC). The effect of the parasitic capacitance is analyzed from an electro magnetic compatibility (EMI) and efficiency point of views. The purpose of this work is to investigate different winding approaches and identify suitable solutions for high switching frequency/high speed transition PFC designs. A low parasitic capacitance PCB based inductor design is proposed to address the challenges imposed by high switching frequency PFC Boost converters.

Original language	English
Title of host publication	Proceedings of IPEC 2014
Publisher	IEEE
Publication date	2014
Pages	3352-3357
ISBN (Print)	9781479927050
DOIs	https://doi.org/10.1109/IPEC.2014.6870168
Publication status	Published - 2014
Event	2014 International Power Electronics Conference - Hiroshima, Japan Duration: 18 May 2014 → 21 May 2014

Conference

Conference	2014 International Power Electronics Conference
Country/Territory	Japan
City	Hiroshima
Period	18/05/2014 → 21/05/2014

Keywords

Parasitic capacitance
PFC
Boundry conduction mode (BCM)
High frequency

Access to Document

10.1109/IPEC.2014.6870168

Low Capacitive Inductors for Fast Switching Devices in Active Power Factor Correction ApplicationsAccepted author manuscript, 2.05 MB

OpenUrl availability

Check availability in DTU Findit

Cite this

@inproceedings{5e130b064163489cb1296740e4a0f1bd,

title = "Low Capacitive Inductors for Fast Switching Devices in Active Power Factor Correction Applications",

abstract = "This paper examines different winding strategies for reduced capacitance inductors in active power factor correction circuits (PFC). The effect of the parasitic capacitance is analyzed from an electro magnetic compatibility (EMI) and efficiency point of views. The purpose of this work is to investigate different winding approaches and identify suitable solutions for high switching frequency/high speed transition PFC designs. A low parasitic capacitance PCB based inductor design is proposed to address the challenges imposed by high switching frequency PFC Boost converters.",

keywords = "Parasitic capacitance, PFC, Boundry conduction mode (BCM), High frequency",

author = "\{Hernandez Botella\}, \{Juan Carlos\} and Petersen, \{Lars Press\} and Andersen, \{Michael A. E.\}",

year = "2014",

doi = "10.1109/IPEC.2014.6870168",

language = "English",

isbn = "9781479927050",

pages = "3352--3357",

booktitle = "Proceedings of IPEC 2014",

publisher = "IEEE",

address = "United States",

note = "2014 International Power Electronics Conference, IPEC 2014 ; Conference date: 18-05-2014 Through 21-05-2014",

}

TY - GEN

T1 - Low Capacitive Inductors for Fast Switching Devices in Active Power Factor Correction Applications

AU - Hernandez Botella, Juan Carlos

AU - Petersen, Lars Press

AU - Andersen, Michael A. E.

PY - 2014

Y1 - 2014

N2 - This paper examines different winding strategies for reduced capacitance inductors in active power factor correction circuits (PFC). The effect of the parasitic capacitance is analyzed from an electro magnetic compatibility (EMI) and efficiency point of views. The purpose of this work is to investigate different winding approaches and identify suitable solutions for high switching frequency/high speed transition PFC designs. A low parasitic capacitance PCB based inductor design is proposed to address the challenges imposed by high switching frequency PFC Boost converters.

AB - This paper examines different winding strategies for reduced capacitance inductors in active power factor correction circuits (PFC). The effect of the parasitic capacitance is analyzed from an electro magnetic compatibility (EMI) and efficiency point of views. The purpose of this work is to investigate different winding approaches and identify suitable solutions for high switching frequency/high speed transition PFC designs. A low parasitic capacitance PCB based inductor design is proposed to address the challenges imposed by high switching frequency PFC Boost converters.

KW - Parasitic capacitance

KW - PFC

KW - Boundry conduction mode (BCM)

KW - High frequency

U2 - 10.1109/IPEC.2014.6870168

DO - 10.1109/IPEC.2014.6870168

M3 - Article in proceedings

SN - 9781479927050

SP - 3352

EP - 3357

BT - Proceedings of IPEC 2014

PB - IEEE

T2 - 2014 International Power Electronics Conference

Y2 - 18 May 2014 through 21 May 2014

ER -

Low Capacitive Inductors for Fast Switching Devices in Active Power Factor Correction Applications

Abstract

Conference

Keywords

Access to Document

OpenUrl availability

Fingerprint

Cite this