Lossless Compression of Broadcast Video

Bo Martins, N. Eriksen, E. Faber, Søren Forchhammer, Søren Otto Forchhammer

    Research output: Book/ReportReportResearchpeer-review

    Abstract

    We investigate several techniques for lossless and near-lossless compression of broadcast video.The emphasis is placed on the emerging international standard for compression of continous-tone still images, JPEG-LS, due to its excellent compression performance and moderatecomplexity. Except for one artificial sequence containing uncompressible data all the 4:2:2, 8-bit test video material easily compresses losslessly to a rate below 125 Mbit/s. At this rate, video plus overhead can be contained in a single telecom 4th order PDH channel or a single STM-1 channel. Difficult 4:2:2, 10-bit test material cannot be expected to code losslessly at a rate of 125 Mbit/s. We investigate the rate and quality effects of quantization using standard JPEG-LS quantization and two new techniques: visual quantization and trellis quantization. Visual quantization is not part of baseline JPEG-LS, but is applicable in the framework of JPEG-LS. Visual tests show that this quantization technique gives much better quality than standard JPEG-LS quantization. Trellis quantization is a process by which the original image is altered in such a way as to make lossless JPEG-LS encoding more effective. For JPEG-LS and visual quantization, we state solutions to the problem of cascaded coding, i.e. show how to prevent multiple encodings from accumulating errors and producing a worse image than just one encoding. We investigate the potential of motion compensated lossless coding. With a motion compensation scheme of reasonable complexity, difficult but natural material is compressed up to 20\% better than with coding using lossless JPEG-LS. More complex schemes lower the bit rate even further. A real-time implementation of JPEG-LS may be carried out in a DSP environment or a FPGA environment. Conservative analysis supported with actual measurements on a DSP suggests that a real-time implementation may be carried out using about 5 DSPs. An FPGA based solution is estimated to demand 4 or 6 FPGAs (each 40.000 gate equivalent)
    Original languageEnglish
    Number of pages141
    Publication statusPublished - 1998

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