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InP DHBT Linear Modulator Driver With a 3-Vppd PAM-4 Output Swing at 90 GBaud: From Enhanced Transistor Modeling to Integrated Circuit Design

  • Romain Hersent*
  • , Tom K. Johansen
  • , Virginie Nodjiadjim
  • , Filipe Jorge
  • , Bernadette Duval
  • , Fabrice Blache
  • , Muriel Riet
  • , Colin Mismer
  • , Jeremie Renaudier
  • , Agnieszka Konczykowska
  • *Corresponding author for this work
  • Nokia
  • Alternative Energies and Atomic Energy Commission

Research output: Contribution to journalJournal articleResearchpeer-review

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Abstract

In this article, we report on the modeling, design, and characterization of indium phosphide (InP) double heterojunction bipolar transistor (DHBT) devices and integrated circuits (ICs) for next-generation optical communications. Critical aspects of transistors’ modeling and their influence on the IC design are detailed, as well as the design and characterization of a lumped linear modulator driver featuring a 3-Vppd four-level pulse-amplitude modulation (PAM-4) output swing at 90 GBaud (GBd). In particular, we propose an electromagnetic (EM) simulation-based parasitic extraction method of the DHBT access structures, to refine the DHBT and IC performance prediction accuracy. It is shown to provide a better estimation of a canonical cascode gain and μ stability factor at millimeterwave frequencies, as well as a better estimation of the driver IC gain in the 50–110 GHz frequency range. Furthermore, a highfrequency gain boosting (self-peaking) topology, based upon an emitter-degenerated paralleled-transistor cascode configuration, is analyzed using a simplified transistor model and leveraged to enhance the linear driver output-stage gain–bandwidth product with controlled amount of peaking gain. This self-peaking technique is shown to be inherent to cascode structures and can therefore be used with other technologies, with no added design complexity. The driver IC was implemented in a 0.5-μm InP-DHBT technology and features a bandwidth well in excess of 110 GHz, with 13 dB of peaking gain at 95 GHz. Besides, it achieves a 9.1-dBm single-ended output power at 1 dB of gain compression and a 2.7% root-mean-square total harmonic distortion (rms-THD) at a 3-Vppd output swing. The driver power consumption is 0.67 W, which is among the lowest in the state of the art and shows a 1.5-GBd driver figure of merit (FoM). To the best of our knowledge, this driver achieves the highest ≥64 GBd PAM-4 performances reported to date, without digital signal processing (DSP) or postprocessing.
Original languageEnglish
JournalIEEE Transactions on Microwave Theory and Techniques
Volume72
Issue number3
Pages (from-to)1618-1633
ISSN0018-9480
DOIs
Publication statusPublished - 2024

Keywords

  • Four-level pulse amplitude modulation (PAM-4)
  • High-speed integrated circuits (ICs)
  • Indium phosphide (InP) double heterojunction bipolar transistor (DHBT),
  • Largeswing linear modulator driver,
  • Tb/s optical communications

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