TY - JOUR
T1 - InP DHBT Linear Modulator Driver With a 3-Vppd PAM-4 Output Swing at 90 GBaud
T2 - From Enhanced Transistor Modeling to Integrated Circuit Design
AU - Hersent, Romain
AU - Johansen, Tom K.
AU - Nodjiadjim, Virginie
AU - Jorge, Filipe
AU - Duval, Bernadette
AU - Blache, Fabrice
AU - Riet, Muriel
AU - Mismer, Colin
AU - Renaudier, Jeremie
AU - Konczykowska, Agnieszka
N1 - Publisher Copyright:
Author
PY - 2024
Y1 - 2024
N2 - In this article, we report on the modeling, design, and characterization of indium phosphide (InP) double heterojunction bipolar transistor (DHBT) devices and integrated circuits (ICs) for next-generation optical communications. Critical aspects of transistors’ modeling and their influence on the IC design are detailed, as well as the design and characterization of a lumped linear modulator driver featuring a 3-Vppd four-level pulse-amplitude modulation (PAM-4) output swing at 90 GBaud (GBd). In particular, we propose an electromagnetic (EM) simulation-based parasitic extraction method of the DHBT access structures, to refine the DHBT and IC performance prediction accuracy. It is shown to provide a better estimation of a canonical cascode gain and μ stability factor at millimeterwave frequencies, as well as a better estimation of the driver IC gain in the 50–110 GHz frequency range. Furthermore, a highfrequency gain boosting (self-peaking) topology, based upon an emitter-degenerated paralleled-transistor cascode configuration, is analyzed using a simplified transistor model and leveraged to enhance the linear driver output-stage gain–bandwidth product with controlled amount of peaking gain. This self-peaking technique is shown to be inherent to cascode structures and can therefore be used with other technologies, with no added design complexity. The driver IC was implemented in a 0.5-μm InP-DHBT technology and features a bandwidth well in excess of 110 GHz, with 13 dB of peaking gain at 95 GHz. Besides, it achieves a 9.1-dBm single-ended output power at 1 dB of gain compression and a 2.7% root-mean-square total harmonic distortion (rms-THD) at a 3-Vppd output swing. The driver power consumption is 0.67 W, which is among the lowest in the state of the art and shows a 1.5-GBd driver figure of merit (FoM). To the best of our knowledge, this driver achieves the highest ≥64 GBd PAM-4 performances reported to date, without digital signal processing (DSP) or postprocessing.
AB - In this article, we report on the modeling, design, and characterization of indium phosphide (InP) double heterojunction bipolar transistor (DHBT) devices and integrated circuits (ICs) for next-generation optical communications. Critical aspects of transistors’ modeling and their influence on the IC design are detailed, as well as the design and characterization of a lumped linear modulator driver featuring a 3-Vppd four-level pulse-amplitude modulation (PAM-4) output swing at 90 GBaud (GBd). In particular, we propose an electromagnetic (EM) simulation-based parasitic extraction method of the DHBT access structures, to refine the DHBT and IC performance prediction accuracy. It is shown to provide a better estimation of a canonical cascode gain and μ stability factor at millimeterwave frequencies, as well as a better estimation of the driver IC gain in the 50–110 GHz frequency range. Furthermore, a highfrequency gain boosting (self-peaking) topology, based upon an emitter-degenerated paralleled-transistor cascode configuration, is analyzed using a simplified transistor model and leveraged to enhance the linear driver output-stage gain–bandwidth product with controlled amount of peaking gain. This self-peaking technique is shown to be inherent to cascode structures and can therefore be used with other technologies, with no added design complexity. The driver IC was implemented in a 0.5-μm InP-DHBT technology and features a bandwidth well in excess of 110 GHz, with 13 dB of peaking gain at 95 GHz. Besides, it achieves a 9.1-dBm single-ended output power at 1 dB of gain compression and a 2.7% root-mean-square total harmonic distortion (rms-THD) at a 3-Vppd output swing. The driver power consumption is 0.67 W, which is among the lowest in the state of the art and shows a 1.5-GBd driver figure of merit (FoM). To the best of our knowledge, this driver achieves the highest ≥64 GBd PAM-4 performances reported to date, without digital signal processing (DSP) or postprocessing.
KW - Four-level pulse amplitude modulation (PAM-4)
KW - High-speed integrated circuits (ICs)
KW - Indium phosphide (InP) double heterojunction bipolar transistor (DHBT),
KW - Largeswing linear modulator driver,
KW - Tb/s optical communications
U2 - 10.1109/TMTT.2023.3305150
DO - 10.1109/TMTT.2023.3305150
M3 - Journal article
AN - SCOPUS:85171531662
SN - 0018-9480
VL - 72
SP - 1618
EP - 1633
JO - IEEE Transactions on Microwave Theory and Techniques
JF - IEEE Transactions on Microwave Theory and Techniques
IS - 3
ER -