Imprecise Arithmetic for Low Power Image Processing

Pietro Albicocco, Gian Carlo Cardarilli, Alberto Nannarelli, Massimo Petricca, Marco Re

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    Abstract

    Sometimes reducing the precision of a numerical processor, by introducing errors, can lead to significant performance (delay, area and power dissipation) improvements without compromising the overall quality of the processing. In this work, we show how to perform the two basic operations, addition and multiplication, in an imprecise manner by simplifying the hardware implementation. With the proposed ”sloppy” operations, we obtain a reduction in delay, area and power dissipation, and the error introduced is still acceptable for applications such as image processing.
    Original languageEnglish
    Title of host publication2012 Conference Record of the Forty Sixth Asilomar Conference on Signals, Systems and Computers (ASILOMAR)
    PublisherIEEE
    Publication date2012
    Pages983-987
    ISBN (Print)978-1-4673-5050-1
    DOIs
    Publication statusPublished - 2012
    Event46th Asilomar Conference on Signals, Systems and Computers - Pacific Grove, CA, United States
    Duration: 4 Nov 20127 Nov 2012
    http://www.asilomarssc.org/

    Conference

    Conference46th Asilomar Conference on Signals, Systems and Computers
    CountryUnited States
    CityPacific Grove, CA
    Period04/11/201207/11/2012
    Internet address
    SeriesAsilomar Conference on Signals, Systems and Computers. Conference Record
    ISSN1058-6393

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