Abstract
Cyber-physical systems in IIoT and Fog computing can use a variety of standards to guarantee real-time communication, based on enhanced switches with quality-of-service, audio-video bridging, time-triggered Ethernet and time-sensitive networking features. However, such real-time enabled network switches often come at a high design and maintenance cost.
This paper explores the feasibility of source time-triggered communication over a standard Ethernet switch without enhanced capabilities and demonstrates the minimum requirements of a system needed to enable time-triggered communication.
To achieve deterministic communication and synchronous operation of the tasks, the worst-case execution time of the tasks is analyzed and a static schedule is defined. We use the IEEE 1588 Precise Time Protocol to provide a global time reference for the network devices and time-triggered messages are scheduled at the source nodes. The communication is implemented and evaluated on a scalable synthetic cyber-physical system test-case composed of three nodes: a time server node and two application nodes that control a servo motor and exchange a time-triggered message containing the duty cycle of the pulse-width modulation signal.
Original language | English |
---|---|
Title of host publication | Proceedings of the Fog-IoT Workshop 2019 |
Editors | Gowri Sankar Ramachandran , Jorge Ortiz |
Number of pages | 5 |
Publisher | Association for Computing Machinery |
Publication date | 2019 |
Pages | 21-25 |
ISBN (Electronic) | 978-1-4503-6698-4 |
DOIs | |
Publication status | Published - 2019 |
Event | 2019 Workshop on Fog Computing and the Internet of Things - Montreal, Canada Duration: 15 Apr 2019 → 18 Apr 2019 |
Conference
Conference | 2019 Workshop on Fog Computing and the Internet of Things |
---|---|
Country/Territory | Canada |
City | Montreal |
Period | 15/04/2019 → 18/04/2019 |
Sponsor | Association for Computing Machinery |
Keywords
- Time-triggered communication
- Cooperative tasks
- Clock synchronization
- WCET analysis
- FPGA implementation