High-Speed Low Power Design in CMOS

Engineering

• Electric Power Utilization 100%
• Design Power 100%
• High Speed 100%
• Networks (Circuits) 66%
• Low Power Consumption 33%
• Application Area 33%
• Performance Requirement 33%
• Power Requirement 33%
• Models 33%
• Differential Input 33%
• Design Display 33%
• Metrics 33%
• Libraries 33%
• Low Voltage 33%

Computer Science

• Low-Power Design 100%
• Dynamic Power Consumption 66%
• Standards 66%
• Power Consumption 33%
• Low Power Consumption 33%
• Application Area 33%
• Performance Requirement 33%
• Power Requirement 33%
• Domains 33%
• Design 33%
• Models 33%