Hardware Transactional Memory Optimization Guidelines, Applied to Ordered Maps

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Synchronization of concurrent data structures is difficult to get right. Fine-grained synchronization locks small data chunks, but requires too high an overhead per chunk, traditional coarse-grained synchronization locks big data chunks, and thereby makes them unavailable to other threads. Neither synchronization method scales well. Recently, hardware transactional memory was introduced, which allows threads to use transactions instead of locks. So far, applying hardware transactional memory has shown mixed results. We believe this is because transactions are different from locks, and using them efficiently requires reasoning about those differences. In this paper we present 5 guidelines for applying hardware transactional memory efficiently, and apply the guidelines to BT-trees, a concurrent ordered map. Evaluating BT-trees on standard benchmarks shows that they are up to 5.3 times faster than traditional maps using hardware transactional memory, and up to 3.9 times faster than state of the art concurrent ordered maps.
Original languageEnglish
Title of host publicationProceedings of the 13th IEEE International Symposium on Parallel and Distributed Processing with Applications (ISPA 2015)
Volume3
PublisherIEEE
Publication date2015
Pages124-131
ISBN (Print)978-1-4673-7951-9
DOIs
Publication statusPublished - 2015
Event13th IEEE International Symposium on Parallel and Distributed Processing with Applications (ISPA 2015) - Helsinki, Finland
Duration: 20 Aug 201522 Aug 2015
Conference number: 13
https://research.comnet.aalto.fi/ISPA2015/

Conference

Conference13th IEEE International Symposium on Parallel and Distributed Processing with Applications (ISPA 2015)
Number13
CountryFinland
CityHelsinki
Period20/08/201522/08/2015
Internet address
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