Fast SD-Hamming Decoding in FPGA for High-Speed Concatenated FEC for Optical Communication

Can Zhang; Søren Forchhammer; Jakob Dahl Andersen; Tayyab Mehmood; Metodi Plamenov Yankov; Knud J. Larsen

Fast SD-Hamming Decoding in FPGA for High-Speed Concatenated FEC for Optical Communication

Can Zhang^*, Søren Forchhammer, Jakob Dahl Andersen, Tayyab Mehmood, Metodi Plamenov Yankov, Knud J. Larsen

^*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceeding › Article in proceedings › Research › peer-review

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Abstract

In this paper, we consider fast decoding of soft-decision (SD) Hamming codes as inner codes in concatenated forward error-correction (FEC) schemes for high-speed optical communication. The goal is single FPGA implementations at speeds of 400 Gb/s and beyond. A low complexity maximum a posteriori (MAP) probability decoding is applied to a (128,120) Hamming code. Chase decoding of a (128,119) Hamming code is also implemented. The VHDL designs for both decoding schemes are presented. The FEC performance and FPGA resource utilization are investigated and compared. Synthesis results indicate that, both the Chase and the MAP decoder leave sufficient resources available to also accommodate a powerful outer hard decision code, on a single FPGA. Furthermore, MAP decoding of (128,120) Hamming code features lower hardware complexity and provides a higher data throughput.

Original language	English
Title of host publication	Proceedings of IEEE Global Communications Conference
Number of pages	6
Publisher	IEEE
ISBN (Print)	978-1-7281-8298-8
Publication status	Accepted/In press - 2021
Event	IEEE Global Communications Conference 2020 - Taipei, Taiwan, Province of China Duration: 7 Dec 2020 → 11 Dec 2020 https://xpresspubs.org/glo20/

Conference

Conference	IEEE Global Communications Conference 2020
Country	Taiwan, Province of China
City	Taipei
Period	07/12/2020 → 11/12/2020
Internet address	https://xpresspubs.org/glo20/

Bibliographical note

Winner of the IEEE GLOBECOM 2020 'Optical Networks & Systems Symposium' Best Paper Award. (https://globecom2020.ieee-globecom.org/program/best-paper-award-winners)

Keywords

Soft-decision
Hamming codes
Chase decoding
Concatenated coding
MAP decoding
VHDL
FPGA

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Cite this

@inproceedings{5a757879e1ed434688a868cfe3de967a,

title = "Fast SD-Hamming Decoding in FPGA for High-Speed Concatenated FEC for Optical Communication",

abstract = "In this paper, we consider fast decoding of soft-decision (SD) Hamming codes as inner codes in concatenated forward error-correction (FEC) schemes for high-speed optical communication. The goal is single FPGA implementations at speeds of 400 Gb/s and beyond. A low complexity maximum a posteriori (MAP) probability decoding is applied to a (128,120) Hamming code. Chase decoding of a (128,119) Hamming code is also implemented. The VHDL designs for both decoding schemes are presented. The FEC performance and FPGA resource utilization are investigated and compared. Synthesis results indicate that, both the Chase and the MAP decoder leave sufficient resources available to also accommodate a powerful outer hard decision code, on a single FPGA. Furthermore, MAP decoding of (128,120) Hamming code features lower hardware complexity and provides a higher data throughput.",

keywords = "Soft-decision, Hamming codes, Chase decoding, Concatenated coding, MAP decoding, VHDL, FPGA",

author = "Can Zhang and S{\o}ren Forchhammer and Andersen, {Jakob Dahl} and Tayyab Mehmood and Yankov, {Metodi Plamenov} and Larsen, {Knud J.}",

note = "Winner of the IEEE GLOBECOM 2020 'Optical Networks & Systems Symposium' Best Paper Award. (https://globecom2020.ieee-globecom.org/program/best-paper-award-winners) ; IEEE Global Communications Conference 2020, IEEE Globecom 2020 ; Conference date: 07-12-2020 Through 11-12-2020",

year = "2021",

language = "English",

isbn = "978-1-7281-8298-8",

booktitle = "Proceedings of IEEE Global Communications Conference",

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}

Fast SD-Hamming Decoding in FPGA for High-Speed Concatenated FEC for Optical Communication. / Zhang, Can ; Forchhammer, Søren ; Andersen, Jakob Dahl ; Mehmood, Tayyab ; Yankov, Metodi Plamenov ; Larsen, Knud J.

Proceedings of IEEE Global Communications Conference. IEEE, 2021.

Research output: Chapter in Book/Report/Conference proceeding › Article in proceedings › Research › peer-review

TY - GEN

T1 - Fast SD-Hamming Decoding in FPGA for High-Speed Concatenated FEC for Optical Communication

AU - Zhang, Can

AU - Forchhammer, Søren

AU - Andersen, Jakob Dahl

AU - Mehmood, Tayyab

AU - Yankov, Metodi Plamenov

AU - Larsen, Knud J.

N1 - Winner of the IEEE GLOBECOM 2020 'Optical Networks & Systems Symposium' Best Paper Award. (https://globecom2020.ieee-globecom.org/program/best-paper-award-winners)

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N2 - In this paper, we consider fast decoding of soft-decision (SD) Hamming codes as inner codes in concatenated forward error-correction (FEC) schemes for high-speed optical communication. The goal is single FPGA implementations at speeds of 400 Gb/s and beyond. A low complexity maximum a posteriori (MAP) probability decoding is applied to a (128,120) Hamming code. Chase decoding of a (128,119) Hamming code is also implemented. The VHDL designs for both decoding schemes are presented. The FEC performance and FPGA resource utilization are investigated and compared. Synthesis results indicate that, both the Chase and the MAP decoder leave sufficient resources available to also accommodate a powerful outer hard decision code, on a single FPGA. Furthermore, MAP decoding of (128,120) Hamming code features lower hardware complexity and provides a higher data throughput.

AB - In this paper, we consider fast decoding of soft-decision (SD) Hamming codes as inner codes in concatenated forward error-correction (FEC) schemes for high-speed optical communication. The goal is single FPGA implementations at speeds of 400 Gb/s and beyond. A low complexity maximum a posteriori (MAP) probability decoding is applied to a (128,120) Hamming code. Chase decoding of a (128,119) Hamming code is also implemented. The VHDL designs for both decoding schemes are presented. The FEC performance and FPGA resource utilization are investigated and compared. Synthesis results indicate that, both the Chase and the MAP decoder leave sufficient resources available to also accommodate a powerful outer hard decision code, on a single FPGA. Furthermore, MAP decoding of (128,120) Hamming code features lower hardware complexity and provides a higher data throughput.

KW - Soft-decision

KW - Hamming codes

KW - Chase decoding

KW - Concatenated coding

KW - MAP decoding

KW - VHDL

KW - FPGA

M3 - Article in proceedings

SN - 978-1-7281-8298-8

BT - Proceedings of IEEE Global Communications Conference

PB - IEEE

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Y2 - 7 December 2020 through 11 December 2020

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