Abstract
Network interfaces play a central role in multicore architectures that use a network-on-chip for communication. Network interface designs have not received much attention in the research community despite this central role.This paper explores different network interface configurations for a real-time network-on-chip architecture. We evaluate the effects of different FIFO queue organizations on the bandwidth and maximum latency of messages in a time-division multiplexing network-on-chip.
| Original language | English |
|---|---|
| Title of host publication | Proceedings of the 2024 IEEE 27th International Symposium on Real-Time Distributed Computing (ISORC) |
| Number of pages | 8 |
| Publisher | IEEE |
| Publication date | 2024 |
| ISBN (Print) | 979-8-3503-7129-1 |
| ISBN (Electronic) | 979-8-3503-7128-4 |
| DOIs | |
| Publication status | Published - 2024 |
| Event | 2024 IEEE 27th International Symposium on Real-Time Distributed Computing - Tunis, Tunisia Duration: 22 May 2024 → 25 May 2024 |
Conference
| Conference | 2024 IEEE 27th International Symposium on Real-Time Distributed Computing |
|---|---|
| Country/Territory | Tunisia |
| City | Tunis |
| Period | 22/05/2024 → 25/05/2024 |
Keywords
- Network-on-chip
- Network Interface
- Real-time system
- Time-predictable Computer Architecture
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