Enhancement of VCO Linearity and Phase Noise by Implementing Frequency Locked Loop

E Ayranci, K Christensen, Pietro Andreani

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    Abstract

    This paper investigates the on-chip implementation of a frequency locked loop (FLL) over a VCO that decreases the phase noise and linearizes the transfer function. Implementation of the FLL inside a PLL is also investigated and a possible application is highlighted. Design of a special kind of low noise frequency detector without a reference frequency (frequency-to-voltage converter), which is the most critical component of the FLL, is also presented in a 0.25 mum BiCMOS process. Linearization and approximately 15 dBc/Hz phase noise suppression is demonstrated over a moderate phase noise LC VCO with a center frequency of 10 GHz.
    Original languageEnglish
    Title of host publicationEUROCON, 2007. The International Conference on "Computer as a Tool"
    PublisherIEEE
    Publication date2007
    ISBN (Print)978-1-4244-0813-9
    DOIs
    Publication statusPublished - 2007
    EventEUROCON, 2007. The International Conference on "Computer as a Tool" - Warsaw
    Duration: 1 Jan 2007 → …

    Conference

    ConferenceEUROCON, 2007. The International Conference on "Computer as a Tool"
    CityWarsaw
    Period01/01/2007 → …

    Bibliographical note

    Copyright: 2007 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE

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