Enhancement Mode GaN-FETs in Extreme Temperature Conditions, Part I: Static Parasitic Parameters

Martijn S. Duraij*, Yudi Xiao, Gabriel Zsurzsan, Zhe Zhang

*Corresponding author for this work

    Research output: Contribution to journal β€Ί Journal article β€Ί Research β€Ί peer-review

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    Smaller packaging and sizing of power electronics and higher operating temperatures of switching devices call for an analysis and verification on the impact of the parasitic components in these devices. Found drift mechanisms in an eGaN-FET are studied by literature and related to measurements performed in extreme temeprature conditions far beyond the manufacturer recommended operating range. A thermal chamber was build to precisely measure the effect of temperature in these devices using a curve tracer. It is found that the increment in π‘…π·π‘†π‘œπ‘›, 𝐼𝐷𝑆𝑆, 𝐼𝐺𝑆𝑆 and 𝑉𝑆𝐷 can be justified by the theory and backed up by measurements. It is also found that the particular eGaN-FET can be suited for extreme temperature operating conditions.
    Original languageEnglish
    JournalAdditional Conferences (device Packaging, Hitec, Hiten, and Cicmt)
    Issue numberHiTEC
    Pages (from-to)000048-000052
    Publication statusPublished - 2021


    • Conduction losses
    • Device characterization
    • eGaN-FET
    • High temperature
    • Parasitic components


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