This paper presents an approach to the synthesis of low-power fault-tolerant hard real-time applications mapped on distributed heterogeneous embedded systems. Our synthesis approach decides the mapping of tasks to processing elements, as well as the voltage and frequency levels for executing each task, such that transient faults are tolerated, the timing constraints of the application are satisfied, and the energy consumed is minimized. Tasks are scheduled using fixed-priority preemptive scheduling, while replication is used for recovery from multiple transient faults. Addressing energy and reliability simultaneously is especially challenging, since lowering the voltage to reduce the energy consumption has been shown to increase the transient fault rate. We presented a Tabu Search-based approach which uses an energy/reliability trade-off model to find reliable and schedulable implementations with limited energy and hardware resources. We evaluated the algorithm proposed using several synthetic and reallife benchmarks.
|Title of host publication||16th Asia and South Pacific Design Automation Conference (ASP-DAC)|
|Publication status||Published - 2011|
|Event||16th Asia and South Pacific Design Automation Conference - Yokohama, Japan|
Duration: 25 Jan 2011 → 28 Jan 2011
Conference number: 16
|Conference||16th Asia and South Pacific Design Automation Conference|
|Period||25/01/2011 → 28/01/2011|