Enabling Coverage-Based Verification in Chisel

Andrew Dobis; Hans Jakob Damsgaard; Enrico Tolotto; Kasper Hesse; Tjark Petersen; Martin Schoeberl

doi:10.1109/ETS54262.2022.9810435

Enabling Coverage-Based Verification in Chisel

Andrew Dobis, Hans Jakob Damsgaard, Enrico Tolotto, Kasper Hesse, Tjark Petersen, Martin Schoeberl

Technical University of Denmark

Research output: Chapter in Book/Report/Conference proceeding › Article in proceedings › Research › peer-review

Abstract

Ever-increasing performance demands are pushing hardware designers towards designing domain-specific accelerators. This has created a demand for improving the overall efficiency of the hardware design and verification cycles. The design efficiency was improved with the introduction of Chisel. However, verification efficiency has yet to be tackled. One method that can increase verification efficiency is the use of various types of coverage measures. In this paper, we present our open-source, coverage-related verification tools targeting digital designs described in Chisel. Specifically, we have created a new method allowing for statement coverage at an intermediate representation of Chisel, and several methods for gathering functional coverage directly on a Chisel description.

Original language	English
Title of host publication	Proceedings of 2022 IEEE European Test Symposium
Number of pages	6
Publisher	IEEE
Publication date	2022
ISBN (Print)	978-1-6654-6707-0
DOIs	https://doi.org/10.1109/ETS54262.2022.9810435
Publication status	Published - 2022
Event	27^th IEEE European Test Symposium - Barcelona, Spain Duration: 23 May 2022 → 27 May 2022 Conference number: 27 https://ets2022.upc.edu/en

Conference

Conference	27^th IEEE European Test Symposium
Number	27
Country/Territory	Spain
City	Barcelona
Period	23/05/2022 → 27/05/2022
Internet address	https://ets2022.upc.edu/en

Keywords

Chisel
Functional Coverage
Hardware Verification
Scala
Statement Coverage

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10.1109/ETS54262.2022.9810435

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title = "Enabling Coverage-Based Verification in Chisel",

abstract = "Ever-increasing performance demands are pushing hardware designers towards designing domain-specific accelerators. This has created a demand for improving the overall efficiency of the hardware design and verification cycles. The design efficiency was improved with the introduction of Chisel. However, verification efficiency has yet to be tackled. One method that can increase verification efficiency is the use of various types of coverage measures. In this paper, we present our open-source, coverage-related verification tools targeting digital designs described in Chisel. Specifically, we have created a new method allowing for statement coverage at an intermediate representation of Chisel, and several methods for gathering functional coverage directly on a Chisel description. ",

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AU - Petersen, Tjark

AU - Schoeberl, Martin

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KW - Statement Coverage

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ER -

Enabling Coverage-Based Verification in Chisel

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