Enabling Coverage-Based Verification in Chisel

Andrew Dobis, Hans Jakob Damsgaard, Enrico Tolotto, Kasper Hesse, Tjark Petersen, Martin Schoeberl

Research output: Chapter in Book/Report/Conference proceedingArticle in proceedingsResearchpeer-review

Abstract

Ever-increasing performance demands are pushing hardware designers towards designing domain-specific accelerators. This has created a demand for improving the overall efficiency of the hardware design and verification cycles. The design efficiency was improved with the introduction of Chisel. However, verification efficiency has yet to be tackled. One method that can increase verification efficiency is the use of various types of coverage measures. In this paper, we present our open-source, coverage-related verification tools targeting digital designs described in Chisel. Specifically, we have created a new method allowing for statement coverage at an intermediate representation of Chisel, and several methods for gathering functional coverage directly on a Chisel description.

Original languageEnglish
Title of host publicationProceedings of 2022 IEEE European Test Symposium
Number of pages6
PublisherIEEE
Publication date2022
ISBN (Print)978-1-6654-6707-0
DOIs
Publication statusPublished - 2022
Event27th IEEE European Test Symposium - Barcelona, Spain
Duration: 23 May 202227 May 2022
Conference number: 27
https://ets2022.upc.edu/en

Conference

Conference27th IEEE European Test Symposium
Number27
Country/TerritorySpain
CityBarcelona
Period23/05/202227/05/2022
Internet address

Keywords

  • Chisel
  • Functional Coverage
  • Hardware Verification
  • Scala
  • Statement Coverage

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