Dynamic range of low-voltage cascode current mirrors

Erik Bruun, Peter Jivan Shah

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    Low-voltage cascode current mirrors are reviewed with respect to the design limitations imposed if all transistors in the mirror are required to operate in the saturation region. It is found that both a lower limit and an upper limit exist for the cascode transistor bias voltage. Further, the use of a signal dependent cascode bias voltage is discussed and a self-biased cascode configuration is presented. This configuration makes it possible to use a higher effective gate-source voltage for the mirror transistors, hence reducing the effect of threshold voltage mismatch on the current mirror gain. The proposed configuration has the advantage of simplicity combined with a complete elimination of the need for fixed bias voltages or bias currents in the current mirror. A disadvantage is that it requires a higher input voltage to the current mirror
    Original languageEnglish
    Title of host publicationProceedings of the IEEE International Symposium on Circuits and Systems
    VolumeVolume 2
    Publication date1995
    ISBN (Print)07-80-32570-2
    Publication statusPublished - 1995
    Event1995 IEEE International Symposium on Circuits and Systems - Seattle, WA, United States
    Duration: 30 Apr 19953 May 1995


    Conference1995 IEEE International Symposium on Circuits and Systems
    Country/TerritoryUnited States
    CitySeattle, WA
    Internet address

    Bibliographical note

    Copyright: 1995 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE


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