Design Principles for Synthesizable Processor Cores

Pascal Schleuniger; Sally A. McKee; Sven  Karlsson

doi:10.1007/978-3-642-28293-5_10

Design Principles for Synthesizable Processor Cores

Pascal Schleuniger, Sally A. McKee, Sven Karlsson

Chalmers University of Technology

Research output: Chapter in Book/Report/Conference proceeding › Article in proceedings › Research › peer-review

Abstract

As FPGAs get more competitive, synthesizable processor cores become an attractive choice for embedded computing. Currently popular commercial processor cores do not fully exploit current FPGA architectures. In this paper, we propose general design principles to increase instruction throughput on FPGA-based processor cores: first, superpipelining enables higher-frequency system clocks, and second, predicated instructions circumvent costly pipeline stalls due to branches. To evaluate their effects, we develop Tinuso, a processor architecture optimized for FPGA implementation. We demonstrate through the use of micro-benchmarks that our principles guide the design of a processor core that improves performance by an average of 38% over a similar Xilinx MicroBlaze configuration.

Original language	English
Title of host publication	Architecture of Computing Systems – ARCS 2012 : 25th International Conference Munich, Germany, February 28 – March 2, 2012 Proceedings
Publisher	Springer
Publication date	2012
Pages	111-122
ISBN (Print)	978-3-642-28292-8
ISBN (Electronic)	978-3-642-28293-5
DOIs	https://doi.org/10.1007/978-3-642-28293-5_10
Publication status	Published - 2012
Event	ARCS 2012 - Architecture of Computing Systems - Garching Campus, München, Germany Duration: 28 Feb 2012 → 2 Mar 2012 Conference number: 25

Conference

Conference	ARCS 2012 - Architecture of Computing Systems
Number	25
Location	Garching Campus
Country/Territory	Germany
City	München
Period	28/02/2012 → 02/03/2012

Series	Lecture Notes in Computer Science
Volume	7179
ISSN	0302-9743

Keywords

Synthesizable processor core
FPGA
Predication
Pipelining

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10.1007/978-3-642-28293-5_10

http://www.arcs2012.tum.de/

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title = "Design Principles for Synthesizable Processor Cores",

abstract = "As FPGAs get more competitive, synthesizable processor cores become an attractive choice for embedded computing. Currently popular commercial processor cores do not fully exploit current FPGA architectures. In this paper, we propose general design principles to increase instruction throughput on FPGA-based processor cores: first, superpipelining enables higher-frequency system clocks, and second, predicated instructions circumvent costly pipeline stalls due to branches. To evaluate their effects, we develop Tinuso, a processor architecture optimized for FPGA implementation. We demonstrate through the use of micro-benchmarks that our principles guide the design of a processor core that improves performance by an average of 38% over a similar Xilinx MicroBlaze configuration.",

keywords = "Synthesizable processor core, FPGA, Predication, Pipelining",

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note = "ARCS 2012 - Architecture of Computing Systems ; Conference date: 28-02-2012 Through 02-03-2012",

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Schleuniger, P, McKee, SA & Karlsson, S 2012, Design Principles for Synthesizable Processor Cores. in Architecture of Computing Systems – ARCS 2012: 25th International Conference Munich, Germany, February 28 – March 2, 2012 Proceedings. Springer, Lecture Notes in Computer Science, vol. 7179, pp. 111-122, ARCS 2012 - Architecture of Computing Systems, München, Germany, 28/02/2012. https://doi.org/10.1007/978-3-642-28293-5_10

Design Principles for Synthesizable Processor Cores. / Schleuniger, Pascal; McKee, Sally A.; Karlsson, Sven .
Architecture of Computing Systems – ARCS 2012: 25th International Conference Munich, Germany, February 28 – March 2, 2012 Proceedings. Springer, 2012. p. 111-122 (Lecture Notes in Computer Science, Vol. 7179).

Research output: Chapter in Book/Report/Conference proceeding › Article in proceedings › Research › peer-review

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AB - As FPGAs get more competitive, synthesizable processor cores become an attractive choice for embedded computing. Currently popular commercial processor cores do not fully exploit current FPGA architectures. In this paper, we propose general design principles to increase instruction throughput on FPGA-based processor cores: first, superpipelining enables higher-frequency system clocks, and second, predicated instructions circumvent costly pipeline stalls due to branches. To evaluate their effects, we develop Tinuso, a processor architecture optimized for FPGA implementation. We demonstrate through the use of micro-benchmarks that our principles guide the design of a processor core that improves performance by an average of 38% over a similar Xilinx MicroBlaze configuration.

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Design Principles for Synthesizable Processor Cores

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Keywords

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